dma-names = "up";
status = "disabled";
+ counter {
+ compatible = "st,stm32-timer-counter";
+ status = "disabled";
+ };
+
timer@5 {
compatible = "st,stm32h7-timer-trigger";
reg = <5>;
dma-names = "up";
status = "disabled";
+ counter {
+ compatible = "st,stm32-timer-counter";
+ status = "disabled";
+ };
+
timer@6 {
compatible = "st,stm32h7-timer-trigger";
reg = <6>;
access-controllers = <&etzpc 23>;
status = "disabled";
+ counter {
+ compatible = "st,stm32-timer-counter";
+ status = "disabled";
+ };
+
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
access-controllers = <&etzpc 24>;
status = "disabled";
+ counter {
+ compatible = "st,stm32-timer-counter";
+ status = "disabled";
+ };
+
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
access-controllers = <&etzpc 25>;
status = "disabled";
+ counter {
+ compatible = "st,stm32-timer-counter";
+ status = "disabled";
+ };
+
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
access-controllers = <&etzpc 26>;
status = "disabled";
+ counter {
+ compatible = "st,stm32-timer-counter";
+ status = "disabled";
+ };
+
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
access-controllers = <&etzpc 27>;
status = "disabled";
+ counter {
+ compatible = "st,stm32-timer-counter";
+ status = "disabled";
+ };
+
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
access-controllers = <&etzpc 28>;
status = "disabled";
+ counter {
+ compatible = "st,stm32-timer-counter";
+ status = "disabled";
+ };
+
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;