clk: versaclock3: Update vc3_get_div() to avoid divide by zero

Update vc3_get_div() to avoid divide by zero operation on
vc3_div_round_rate() by returning1, if there is no table match
found.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20231122142310.203169-2-biju.das.jz@bp.renesas.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c
index 00930d7bca778e31228c4a9e05926007e1098060..3aad69a08512d0aa52e08b6abeb0c541873320ea 100644 (file)
--- a/drivers/clk/clk-versaclock3.c
+++ b/drivers/clk/clk-versaclock3.c
@@ -477,7 +477,7 @@ static unsigned int vc3_get_div(const struct clk_div_table *table,
                if (clkt->val == val)
                        return clkt->div;
 
-       return 0;
+       return 1;
 }
 
 static unsigned long vc3_div_recalc_rate(struct clk_hw *hw,