arm64/sysreg: Add register fields for HFGWTR2_EL2

This adds register fields for HFGWTR2_EL2 as per the definitions based
on DDI0601 2024-12.

Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20250203050828.1049370-7-anshuman.khandual@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index cae085317b8c06671d3231e66d40b3fd83a59241..891fe033e1b63a406cdd316beaaa8401ab5bad37 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2719,6 +2719,25 @@ Field    1       nERXGSR_EL1
 Field  0       nPFAR_EL1
 EndSysreg
 
+Sysreg HFGWTR2_EL2     3       4       3       1       3
+Res0   63:15
+Field  14      nACTLRALIAS_EL1
+Field  13      nACTLRMASK_EL1
+Field  12      nTCR2ALIAS_EL1
+Field  11      nTCRALIAS_EL1
+Field  10      nSCTLRALIAS2_EL1
+Field  9       nSCTLRALIAS_EL1
+Field  8       nCPACRALIAS_EL1
+Field  7       nTCR2MASK_EL1
+Field  6       nTCRMASK_EL1
+Field  5       nSCTLR2MASK_EL1
+Field  4       nSCTLRMASK_EL1
+Field  3       nCPACRMASK_EL1
+Field  2       nRCWSMASK_EL1
+Res0   1
+Field  0       nPFAR_EL1
+EndSysreg
+
 Sysreg HDFGRTR_EL2     3       4       3       1       4
 Field  63      PMBIDR_EL1
 Field  62      nPMSNEVFR_EL1