drm/amdgpu/gfx9: drop duplicate gfx info init (v3)

Taken care of by gpu info firmware now.

v2: rebase
v3: rework based on latest firmware

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 0c16b7563b7317e2b63aef0a1800945f72430091..3f5ba3fd08b7d0c36760581445e619dd9c5e4ac9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -770,21 +770,11 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
 
        switch (adev->asic_type) {
        case CHIP_VEGA10:
-               adev->gfx.config.max_shader_engines = 4;
-               adev->gfx.config.max_cu_per_sh = 16;
-               adev->gfx.config.max_sh_per_se = 1;
-               adev->gfx.config.max_backends_per_se = 4;
-               adev->gfx.config.max_texture_channel_caches = 16;
-               adev->gfx.config.max_gprs = 256;
-               adev->gfx.config.max_gs_threads = 32;
                adev->gfx.config.max_hw_contexts = 8;
-
                adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;
                adev->gfx.config.sc_prim_fifo_size_backend = 0x100;
                adev->gfx.config.sc_hiz_tile_fifo_size = 0x30;
                adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0;
-               adev->gfx.config.gs_vgt_table_depth = 32;
-               adev->gfx.config.gs_prim_buffer_depth = 1792;
                gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN;
                break;
        default: