mmc: sunxi-mmc: Fix DMA descriptors allocated above 32 bits

Newer variants of the MMC controller support a 34-bit physical address
space by using word addresses instead of byte addresses. However, the
code truncates the DMA descriptor address to 32 bits before applying the
shift. This breaks DMA for descriptors allocated above the 32-bit limit.

Fixes: 3536b82e5853 ("mmc: sunxi: add support for A100 mmc controller")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220424231751.32053-1-samuel@sholland.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index c62afd21269256bbc1f67e5e54d6acae92268a20..46f9e2923d869807f48d31ed56a0967175f91e2c 100644 (file)
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -377,8 +377,9 @@ static void sunxi_mmc_init_idma_des(struct sunxi_mmc_host *host,
                pdes[i].buf_addr_ptr1 =
                        cpu_to_le32(sg_dma_address(&data->sg[i]) >>
                                    host->cfg->idma_des_shift);
-               pdes[i].buf_addr_ptr2 = cpu_to_le32((u32)next_desc >>
-                                                   host->cfg->idma_des_shift);
+               pdes[i].buf_addr_ptr2 =
+                       cpu_to_le32(next_desc >>
+                                   host->cfg->idma_des_shift);
        }
 
        pdes[0].config |= cpu_to_le32(SDXC_IDMAC_DES0_FD);