RDMA/irdma: Process extended CQ entries correctly

The valid bit for extended CQE's written by HW is retrieved from the
incorrect quad-word. This leads to missed completions for any UD traffic
particularly after a wrap-around.

Get the valid bit for extended CQE's from the correct quad-word in the
descriptor.

Fixes: 551c46edc769 ("RDMA/irdma: Add user/kernel shared libraries")
Link: https://lore.kernel.org/r/20211005182302.374-1-shiraz.saleem@intel.com
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

diff --git a/drivers/infiniband/hw/irdma/uk.c b/drivers/infiniband/hw/irdma/uk.c
index 5fb92de1f015aa996c0780969775f2ce88507813..9b544a3b128867361084884386abff8ef15c905b 100644 (file)
--- a/drivers/infiniband/hw/irdma/uk.c
+++ b/drivers/infiniband/hw/irdma/uk.c
@@ -1092,12 +1092,12 @@ irdma_uk_cq_poll_cmpl(struct irdma_cq_uk *cq, struct irdma_cq_poll_info *info)
                if (cq->avoid_mem_cflct) {
                        ext_cqe = (__le64 *)((u8 *)cqe + 32);
                        get_64bit_val(ext_cqe, 24, &qword7);
-                       polarity = (u8)FIELD_GET(IRDMA_CQ_VALID, qword3);
+                       polarity = (u8)FIELD_GET(IRDMA_CQ_VALID, qword7);
                } else {
                        peek_head = (cq->cq_ring.head + 1) % cq->cq_ring.size;
                        ext_cqe = cq->cq_base[peek_head].buf;
                        get_64bit_val(ext_cqe, 24, &qword7);
-                       polarity = (u8)FIELD_GET(IRDMA_CQ_VALID, qword3);
+                       polarity = (u8)FIELD_GET(IRDMA_CQ_VALID, qword7);
                        if (!peek_head)
                                polarity ^= 1;
                }