Merge tag 'ntb-5.1' of git://github.com/jonmason/ntb
authorLinus Torvalds <torvalds@linux-foundation.org>
Fri, 15 Mar 2019 21:32:59 +0000 (14:32 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Fri, 15 Mar 2019 21:32:59 +0000 (14:32 -0700)
Pull NTB updates from Jon Mason:

 - fixes for switchtec debugability and mapping table entries

 - NTB transport improvements

 - a reworking of the peer_db_addr for better abstraction

* tag 'ntb-5.1' of git://github.com/jonmason/ntb:
  NTB: add new parameter to peer_db_addr() db_bit and db_data
  NTB: ntb_transport: Ensure the destination buffer is mapped for TX DMA
  NTB: ntb_transport: Free MWs in ntb_transport_link_cleanup()
  ntb_hw_switchtec: Added support of >=4G memory windows
  ntb_hw_switchtec: NT req id mapping table register entry number should be 512
  ntb_hw_switchtec: debug print 64bit aligned crosslink BAR Numbers

1  2 
drivers/ntb/hw/mscc/ntb_hw_switchtec.c

index f2df2d39c65b0e87838c413988ca089d11b6b466,9ae9445977084ff652aa95fefdcb3487d8811ac6..d905d368d28c716a4ca5fa7a59766be06f601eab
   *
   */
  
 -#include <linux/switchtec.h>
 -#include <linux/module.h>
 +#include <linux/interrupt.h>
 +#include <linux/io-64-nonatomic-lo-hi.h>
  #include <linux/delay.h>
  #include <linux/kthread.h>
 -#include <linux/interrupt.h>
 +#include <linux/module.h>
  #include <linux/ntb.h>
  #include <linux/pci.h>
 +#include <linux/switchtec.h>
  
  MODULE_DESCRIPTION("Microsemi Switchtec(tm) NTB Driver");
  MODULE_VERSION("0.1");
@@@ -37,6 -36,35 +37,6 @@@ module_param(use_lut_mws, bool, 0644)
  MODULE_PARM_DESC(use_lut_mws,
                 "Enable the use of the LUT based memory windows");
  
 -#ifndef ioread64
 -#ifdef readq
 -#define ioread64 readq
 -#else
 -#define ioread64 _ioread64
 -static inline u64 _ioread64(void __iomem *mmio)
 -{
 -      u64 low, high;
 -
 -      low = ioread32(mmio);
 -      high = ioread32(mmio + sizeof(u32));
 -      return low | (high << 32);
 -}
 -#endif
 -#endif
 -
 -#ifndef iowrite64
 -#ifdef writeq
 -#define iowrite64 writeq
 -#else
 -#define iowrite64 _iowrite64
 -static inline void _iowrite64(u64 val, void __iomem *mmio)
 -{
 -      iowrite32(val, mmio);
 -      iowrite32(val >> 32, mmio + sizeof(u32));
 -}
 -#endif
 -#endif
 -
  #define SWITCHTEC_NTB_MAGIC 0x45CC0001
  #define MAX_MWS     128
  
@@@ -236,6 -264,7 +236,7 @@@ static void switchtec_ntb_mw_clr_direct
        ctl_val &= ~NTB_CTRL_BAR_DIR_WIN_EN;
        iowrite32(ctl_val, &ctl->bar_entry[bar].ctl);
        iowrite32(0, &ctl->bar_entry[bar].win_size);
+       iowrite32(0, &ctl->bar_ext_entry[bar].win_size);
        iowrite64(sndev->self_partition, &ctl->bar_entry[bar].xlate_addr);
  }
  
@@@ -258,7 -287,9 +259,9 @@@ static void switchtec_ntb_mw_set_direct
        ctl_val |= NTB_CTRL_BAR_DIR_WIN_EN;
  
        iowrite32(ctl_val, &ctl->bar_entry[bar].ctl);
-       iowrite32(xlate_pos | size, &ctl->bar_entry[bar].win_size);
+       iowrite32(xlate_pos | (lower_32_bits(size) & 0xFFFFF000),
+                 &ctl->bar_entry[bar].win_size);
+       iowrite32(upper_32_bits(size), &ctl->bar_ext_entry[bar].win_size);
        iowrite64(sndev->self_partition | addr,
                  &ctl->bar_entry[bar].xlate_addr);
  }
@@@ -679,11 -710,16 +682,16 @@@ static u64 switchtec_ntb_db_read_mask(s
  
  static int switchtec_ntb_peer_db_addr(struct ntb_dev *ntb,
                                      phys_addr_t *db_addr,
-                                     resource_size_t *db_size)
+                                     resource_size_t *db_size,
+                                     u64 *db_data,
+                                     int db_bit)
  {
        struct switchtec_ntb *sndev = ntb_sndev(ntb);
        unsigned long offset;
  
+       if (unlikely(db_bit >= BITS_PER_LONG_LONG))
+               return -EINVAL;
        offset = (unsigned long)sndev->mmio_peer_dbmsg->odb -
                (unsigned long)sndev->stdev->mmio;
  
                *db_addr = pci_resource_start(ntb->pdev, 0) + offset;
        if (db_size)
                *db_size = sizeof(u32);
+       if (db_data)
+               *db_data = BIT_ULL(db_bit) << sndev->db_peer_shift;
  
        return 0;
  }
@@@ -1025,7 -1063,9 +1035,9 @@@ static int crosslink_setup_mws(struct s
                ctl_val |= NTB_CTRL_BAR_DIR_WIN_EN;
  
                iowrite32(ctl_val, &ctl->bar_entry[bar].ctl);
-               iowrite32(xlate_pos | size, &ctl->bar_entry[bar].win_size);
+               iowrite32(xlate_pos | (lower_32_bits(size) & 0xFFFFF000),
+                         &ctl->bar_entry[bar].win_size);
+               iowrite32(upper_32_bits(size), &ctl->bar_ext_entry[bar].win_size);
                iowrite64(sndev->peer_partition | addr,
                          &ctl->bar_entry[bar].xlate_addr);
        }
@@@ -1092,7 -1132,7 +1104,7 @@@ static int crosslink_enum_partition(str
  
                dev_dbg(&sndev->stdev->dev,
                        "Crosslink BAR%d addr: %llx\n",
-                       i, bar_addr);
+                       i*2, bar_addr);
  
                if (bar_addr != bar_space * i)
                        continue;
@@@ -1311,10 -1351,10 +1323,10 @@@ static int switchtec_ntb_init_shared_mw
        int rc;
  
        sndev->nr_rsvd_luts++;
 -      sndev->self_shared = dma_zalloc_coherent(&sndev->stdev->pdev->dev,
 -                                               LUT_SIZE,
 -                                               &sndev->self_shared_dma,
 -                                               GFP_KERNEL);
 +      sndev->self_shared = dma_alloc_coherent(&sndev->stdev->pdev->dev,
 +                                              LUT_SIZE,
 +                                              &sndev->self_shared_dma,
 +                                              GFP_KERNEL);
        if (!sndev->self_shared) {
                dev_err(&sndev->stdev->dev,
                        "unable to allocate memory for shared mw\n");