arm64: dts: renesas: gray-hawk-single: Add video capture support

The Gray-Hawk single board contains two MAX96724 connected to the using
I2C and CSI-2, record the connections. Also enable all nodes (VIN, CSI-2
and ISP) that are part of the downstream video capture pipeline.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241209125504.2010984-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
index 521d4ea94aa802b2c4158d6dece4fc74b4e2ae02..18fd52f55de5b75b30c539563b107b6bd9a5f561 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts
@@ -30,6 +30,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/leds/common.h>
+#include <dt-bindings/media/video-interfaces.h>
 
 #include "r8a779h0.dtsi"
 
@@ -251,6 +252,46 @@
        status = "okay";
 };
 
+&csi40 {
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+
+                       csi40_in: endpoint {
+                               bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
+                               clock-lanes = <0>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&max96724_out0>;
+                       };
+               };
+       };
+};
+
+&csi41 {
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+
+                       csi41_in: endpoint {
+                               bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
+                               clock-lanes = <0>;
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = <&max96724_out1>;
+                       };
+               };
+       };
+};
+
 &extal_clk {
        clock-frequency = <16666666>;
 };
@@ -301,6 +342,20 @@
                #interrupt-cells = <2>;
        };
 
+       io_expander_b: gpio@21 {
+               compatible = "onnn,pca9654";
+               reg = <0x21>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       io_expander_c: gpio@22 {
+               compatible = "onnn,pca9654";
+               reg = <0x22>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
        eeprom@50 {
                compatible = "rohm,br24g01", "atmel,24c01";
                label = "cpu-board";
@@ -377,6 +432,48 @@
                        };
                };
        };
+
+       gmsl0: gmsl-deserializer@4e {
+               compatible = "maxim,max96724";
+               reg = <0x4e>;
+               enable-gpios = <&io_expander_b 0 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@4 {
+                               reg = <4>;
+                               max96724_out0: endpoint {
+                                       bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       remote-endpoint = <&csi40_in>;
+                               };
+                       };
+               };
+       };
+
+       gmsl1: gmsl-deserializer@4f {
+               compatible = "maxim,max96724";
+               reg = <0x4f>;
+               enable-gpios = <&io_expander_c 0 GPIO_ACTIVE_HIGH>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@4 {
+                               reg = <4>;
+                               max96724_out1: endpoint {
+                                       bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
+                                       clock-lanes = <0>;
+                                       data-lanes = <1 2 3 4>;
+                                       remote-endpoint = <&csi41_in>;
+                               };
+                       };
+               };
+       };
 };
 
 &i2c3 {
@@ -402,6 +499,14 @@
        };
 };
 
+&isp0 {
+       status = "okay";
+};
+
+&isp1 {
+       status = "okay";
+};
+
 &mmc0 {
        pinctrl-0 = <&mmc_pins>;
        pinctrl-1 = <&mmc_pins>;
@@ -599,3 +704,67 @@
 &scif_clk2 {
        clock-frequency = <24000000>;
 };
+
+&vin00 {
+       status = "okay";
+};
+
+&vin01 {
+       status = "okay";
+};
+
+&vin02 {
+       status = "okay";
+};
+
+&vin03 {
+       status = "okay";
+};
+
+&vin04 {
+       status = "okay";
+};
+
+&vin05 {
+       status = "okay";
+};
+
+&vin06 {
+       status = "okay";
+};
+
+&vin07 {
+       status = "okay";
+};
+
+&vin08 {
+       status = "okay";
+};
+
+&vin09 {
+       status = "okay";
+};
+
+&vin10 {
+       status = "okay";
+};
+
+&vin11 {
+       status = "okay";
+};
+
+&vin12 {
+       status = "okay";
+};
+
+&vin13 {
+       status = "okay";
+};
+
+&vin14 {
+       status = "okay";
+};
+
+&vin15 {
+       status = "okay";
+};