drm/i915/uncore: Drop gen11 mmio read handlers

Consolidate down to just a single 'fwtable' implementation.  For reads
we don't need to worry about shadow tables.

While consolidating the functions, gen11/gen12 pick up a
NEEDS_FORCE_WAKE() check that they didn't have before, allowing them to
bypass a lot of forcewake/shadow checking for non-GT registers (e.g.,
display).

v2:
 - Restore NEEDS_FORCE_WAKE() check.  (Chris, Tvrtko)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210910201030.3436066-6-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 00da0b7182930c204fb7e9eae190fce363a16847..2547a9e02efcb72452dc33f890109adb4865d9f4 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -935,9 +935,6 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = {
        __fwd; \
 })
 
-#define __gen11_fwtable_reg_read_fw_domains(uncore, offset) \
-       find_fw_domain(uncore, offset)
-
 /* *Must* be sorted by offset! See intel_shadow_table_check(). */
 static const struct i915_range gen8_shadowed_regs[] = {
        { .start =  0x2030, .end =  0x2030 },
@@ -1567,33 +1564,30 @@ static inline void __force_wake_auto(struct intel_uncore *uncore,
                ___force_wake_auto(uncore, fw_domains);
 }
 
-#define __gen_read(func, x) \
+#define __gen_fwtable_read(x) \
 static u##x \
-func##_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
+fwtable_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) \
+{ \
        enum forcewake_domains fw_engine; \
        GEN6_READ_HEADER(x); \
-       fw_engine = __##func##_reg_read_fw_domains(uncore, offset); \
+       fw_engine = __fwtable_reg_read_fw_domains(uncore, offset); \
        if (fw_engine) \
                __force_wake_auto(uncore, fw_engine); \
        val = __raw_uncore_read##x(uncore, reg); \
        GEN6_READ_FOOTER; \
 }
 
-#define __gen_reg_read_funcs(func) \
-static enum forcewake_domains \
-func##_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
-       return __##func##_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
-} \
-\
-__gen_read(func, 8) \
-__gen_read(func, 16) \
-__gen_read(func, 32) \
-__gen_read(func, 64)
+static enum forcewake_domains
+fwtable_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) {
+       return __fwtable_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg));
+}
 
-__gen_reg_read_funcs(gen11_fwtable);
-__gen_reg_read_funcs(fwtable);
+__gen_fwtable_read(8)
+__gen_fwtable_read(16)
+__gen_fwtable_read(32)
+__gen_fwtable_read(64)
 
-#undef __gen_reg_read_funcs
+#undef __gen_fwtable_read
 #undef GEN6_READ_FOOTER
 #undef GEN6_READ_HEADER
 
@@ -2059,22 +2053,22 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
                ASSIGN_FW_DOMAINS_TABLE(uncore, __dg2_fw_ranges);
                ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
                ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
-               ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
+               ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
        } else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
                ASSIGN_FW_DOMAINS_TABLE(uncore, __xehp_fw_ranges);
                ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
                ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
-               ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
+               ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
        } else if (GRAPHICS_VER(i915) >= 12) {
                ASSIGN_FW_DOMAINS_TABLE(uncore, __gen12_fw_ranges);
                ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
                ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
-               ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
+               ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
        } else if (GRAPHICS_VER(i915) == 11) {
                ASSIGN_FW_DOMAINS_TABLE(uncore, __gen11_fw_ranges);
                ASSIGN_SHADOW_TABLE(uncore, gen11_shadowed_regs);
                ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
-               ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
+               ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
        } else if (IS_GRAPHICS_VER(i915, 9, 10)) {
                ASSIGN_FW_DOMAINS_TABLE(uncore, __gen9_fw_ranges);
                ASSIGN_SHADOW_TABLE(uncore, gen8_shadowed_regs);