riscv: cleanup svpbmt cpufeature probing
authorHeiko Stuebner <heiko@sntech.de>
Mon, 5 Sep 2022 11:10:23 +0000 (13:10 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 13 Oct 2022 15:46:26 +0000 (08:46 -0700)
For better readability (and compile time coverage) use IS_ENABLED
instead of ifdef and drop the new unneeded switch statement.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20220905111027.2463297-2-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/cpufeature.c

index 553d755483ed6d2c86051e5e4decb4a21d030874..764ea220161f65982cf2f62d6949c03102a703b7 100644 (file)
@@ -253,16 +253,13 @@ void __init riscv_fill_hwcap(void)
 #ifdef CONFIG_RISCV_ALTERNATIVE
 static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage)
 {
-#ifdef CONFIG_RISCV_ISA_SVPBMT
-       switch (stage) {
-       case RISCV_ALTERNATIVES_EARLY_BOOT:
+       if (!IS_ENABLED(CONFIG_RISCV_ISA_SVPBMT))
                return false;
-       default:
-               return riscv_isa_extension_available(NULL, SVPBMT);
-       }
-#endif
 
-       return false;
+       if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
+               return false;
+
+       return riscv_isa_extension_available(NULL, SVPBMT);
 }
 
 static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage)