Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

Pull perf fixes from Thomas Gleixner:
 "Another pile of fixes for perf:

   - Plug overflows and races in the core code

   - Sanitize the flow of the perf syscall so we error out before
     handling the more complex and hard to undo setups

   - Improve and fix Broadwell and Skylake hardware support

   - Revert a fix which broke what it tried to fix in perf tools

   - A couple of smaller fixes in various places of perf tools"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf tools: Fix copying of /proc/kcore
  perf intel-pt: Remove no_force_psb from documentation
  perf probe: Use existing routine to look for a kernel module by dso->short_name
  perf/x86: Change test_aperfmperf() and test_intel() to static
  tools lib traceevent: Fix string handling in heterogeneous arch environments
  perf record: Avoid infinite loop at buildid processing with no samples
  perf: Fix races in computing the header sizes
  perf: Fix u16 overflows
  perf: Restructure perf syscall point of no return
  perf/x86/intel: Fix Skylake FRONTEND MSR extrareg mask
  perf/x86/intel/pebs: Add PEBS frontend profiling for Skylake
  perf/x86/intel: Make the CYCLE_ACTIVITY.* constraint on Broadwell more specific
  perf tools: Bool functions shouldn't return -1
  tools build: Add test for presence of __get_cpuid() gcc builtin
  tools build: Add test for presence of numa_num_possible_cpus() in libnuma
  Revert "perf symbols: Fix mismatched declarations for elf_getphdrnum"
  perf stat: Fix per-pkg event reporting bug

diff --combined arch/x86/include/asm/msr-index.h
index b98b471a3b7e660c35910ec5bde5d3580af3f498,54390bc140dd6a367bf5112c0a3a8930b0c326fd..b8c14bb7fc8f37ee004dc10342a99c8579110e1d
--- 1/arch/x86/include/asm/msr-index.h
--- 2/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@@ -141,6 -141,8 +141,8 @@@
  #define DEBUGCTLMSR_BTS_OFF_USR               (1UL << 10)
  #define DEBUGCTLMSR_FREEZE_LBRS_ON_PMI        (1UL << 11)
  
+ #define MSR_PEBS_FRONTEND             0x000003f7
+ 
  #define MSR_IA32_POWER_CTL            0x000001fc
  
  #define MSR_IA32_MC0_CTL              0x00000400
@@@ -331,7 -333,6 +333,7 @@@
  /* C1E active bits in int pending message */
  #define K8_INTP_C1E_ACTIVE_MASK               0x18000000
  #define MSR_K8_TSEG_ADDR              0xc0010112
 +#define MSR_K8_TSEG_MASK              0xc0010113
  #define K8_MTRRFIXRANGE_DRAM_ENABLE   0x00040000 /* MtrrFixDramEn bit    */
  #define K8_MTRRFIXRANGE_DRAM_MODIFY   0x00080000 /* MtrrFixDramModEn bit */
  #define K8_MTRR_RDMEM_WRMEM_MASK      0x18181818 /* Mask: RdMem|WrMem    */