{
struct cxl_endpoint_dvsec_info *info = &cxlds->info;
struct pci_dev *pdev = to_pci_dev(cxlds->dev);
+ struct device *dev = &pdev->dev;
int d = cxlds->cxl_dvsec;
int hdm_count, rc, i;
u16 cap, ctrl;
- if (!d)
+ if (!d) {
+ dev_dbg(dev, "No DVSEC Capability\n");
return -ENXIO;
+ }
rc = pci_read_config_word(pdev, d + CXL_DVSEC_CAP_OFFSET, &cap);
if (rc)
if (rc)
return rc;
- if (!(cap & CXL_DVSEC_MEM_CAPABLE))
+ if (!(cap & CXL_DVSEC_MEM_CAPABLE)) {
+ dev_dbg(dev, "Not MEM Capable\n");
return -ENXIO;
+ }
/*
* It is not allowed by spec for MEM.capable to be set and have 0 legacy
return -EINVAL;
rc = wait_for_valid(cxlds);
- if (rc)
+ if (rc) {
+ dev_dbg(dev, "Failure awaiting MEM_INFO_VALID (%d)\n", rc);
return rc;
+ }
info->mem_enabled = FIELD_GET(CXL_DVSEC_MEM_ENABLE, ctrl);