arm64: tegra: Add Host1x context stream IDs on Tegra186+
authorMikko Perttunen <mperttunen@nvidia.com>
Mon, 27 Jun 2022 14:19:50 +0000 (17:19 +0300)
committerThierry Reding <treding@nvidia.com>
Fri, 8 Jul 2022 16:00:13 +0000 (18:00 +0200)
Add Host1x context stream IDs on systems that support Host1x context
isolation. Host1x and attached engines can use these stream IDs to
allow isolation between memory used by different processes.

The specified stream IDs must match those configured by the hypervisor,
if one is present.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra186.dtsi
arch/arm64/boot/dts/nvidia/tegra194.dtsi

index a07acdaf345f4473b565233e0d7cafa32f62d489..59a10fb184f8258cbfffa2841cda424e301f6815 100644 (file)
 
                iommus = <&smmu TEGRA186_SID_HOST1X>;
 
+               /* Context isolation domains */
+               iommu-map = <
+                       0 &smmu TEGRA186_SID_HOST1X_CTX0 1
+                       1 &smmu TEGRA186_SID_HOST1X_CTX1 1
+                       2 &smmu TEGRA186_SID_HOST1X_CTX2 1
+                       3 &smmu TEGRA186_SID_HOST1X_CTX3 1
+                       4 &smmu TEGRA186_SID_HOST1X_CTX4 1
+                       5 &smmu TEGRA186_SID_HOST1X_CTX5 1
+                       6 &smmu TEGRA186_SID_HOST1X_CTX6 1
+                       7 &smmu TEGRA186_SID_HOST1X_CTX7 1>;
+
                dpaux1: dpaux@15040000 {
                        compatible = "nvidia,tegra186-dpaux";
                        reg = <0x15040000 0x10000>;
index 7ab6cc0a2bb6037eb44dbff552286b59cdffd0ce..d0ed55e5c8607b16f478f9814e8a992452d64839 100644 (file)
                        interconnect-names = "dma-mem";
                        iommus = <&smmu TEGRA194_SID_HOST1X>;
 
+                       /* Context isolation domains */
+                       iommu-map = <
+                               0 &smmu TEGRA194_SID_HOST1X_CTX0 1
+                               1 &smmu TEGRA194_SID_HOST1X_CTX1 1
+                               2 &smmu TEGRA194_SID_HOST1X_CTX2 1
+                               3 &smmu TEGRA194_SID_HOST1X_CTX3 1
+                               4 &smmu TEGRA194_SID_HOST1X_CTX4 1
+                               5 &smmu TEGRA194_SID_HOST1X_CTX5 1
+                               6 &smmu TEGRA194_SID_HOST1X_CTX6 1
+                               7 &smmu TEGRA194_SID_HOST1X_CTX7 1>;
+
                        nvdec@15140000 {
                                compatible = "nvidia,tegra194-nvdec";
                                reg = <0x15140000 0x00040000>;