net/mlx5: Add support for MRTCQ register
authorJianbo Liu <jianbol@nvidia.com>
Thu, 9 Jan 2025 20:42:29 +0000 (22:42 +0200)
committerLeon Romanovsky <leon@kernel.org>
Sun, 12 Jan 2025 08:58:00 +0000 (03:58 -0500)
Management Real Time Clock Query (MRTCQ) register is used to query
hardware clock identity.

Signed-off-by: Jianbo Liu <jianbol@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250109204231.1809851-3-tariqt@nvidia.com
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
include/linux/mlx5/driver.h
include/linux/mlx5/mlx5_ifc.h

index fc7e6153b73d9e64869054d08801706bb1a5c84f..8f6fe29bc4be617a69c55e71c3cf0d494ed2d61e 100644 (file)
@@ -160,6 +160,7 @@ enum {
        MLX5_REG_MIRC            = 0x9162,
        MLX5_REG_MTPTM           = 0x9180,
        MLX5_REG_MTCTR           = 0x9181,
+       MLX5_REG_MRTCQ           = 0x9182,
        MLX5_REG_SBCAM           = 0xB01F,
        MLX5_REG_RESOURCE_DUMP   = 0xC000,
        MLX5_REG_DTOR            = 0xC00E,
index c3da1581853c333098605fd1139a002182477f0e..221146278ac867b183083cadce1cea559f5cb6b2 100644 (file)
@@ -10680,7 +10680,8 @@ struct mlx5_ifc_mcam_access_reg_bits3 {
 
        u8         regs_63_to_32[0x20];
 
-       u8         regs_31_to_2[0x1e];
+       u8         regs_31_to_3[0x1d];
+       u8         mrtcq[0x1];
        u8         mtctr[0x1];
        u8         mtptm[0x1];
 };
@@ -13171,4 +13172,12 @@ struct mlx5_ifc_msees_reg_bits {
        u8         reserved_at_80[0x180];
 };
 
+struct mlx5_ifc_mrtcq_reg_bits {
+       u8         reserved_at_0[0x40];
+
+       u8         rt_clock_identity[0x40];
+
+       u8         reserved_at_80[0x180];
+};
+
 #endif /* MLX5_IFC_H */