ath9k: Add antenna diversity tweak for CUS198
authorSujith Manoharan <c_manoha@qca.qualcomm.com>
Mon, 19 Aug 2013 05:34:01 +0000 (11:04 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Thu, 22 Aug 2013 18:30:29 +0000 (14:30 -0400)
This improves RX diversity and performance for AR9485.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
drivers/net/wireless/ath/ath9k/ar9003_phy.h
drivers/net/wireless/ath/ath9k/hw.h
drivers/net/wireless/ath/ath9k/init.c

index abdc7ee874139b26e42ded779d42da8295d05775..a6846abf47497e1787133bb527541764c7ee5115 100644 (file)
@@ -3825,6 +3825,11 @@ static void ar9003_hw_atten_apply(struct ath_hw *ah, struct ath9k_channel *chan)
                        else
                                value = ar9003_hw_atten_chain_get_margin(ah, i, chan);
 
+                       if (ah->config.alt_mingainidx)
+                               REG_RMW_FIELD(ah, AR_PHY_EXT_ATTEN_CTL_0,
+                                             AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN,
+                                             value);
+
                        REG_RMW_FIELD(ah, ext_atten_reg[i],
                                      AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN,
                                      value);
index 23c019d0d9aa9f31e47e2ee50e23858130b1add8..6fd752321e3616c171c81be16a754b31486de667 100644 (file)
 #define AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S   28
 #define AR_PHY_EXT_CCA_THRESH62 0x007F0000
 #define AR_PHY_EXT_CCA_THRESH62_S       16
+#define AR_PHY_EXTCHN_PWRTHR1_ANT_DIV_ALT_ANT_MINGAINIDX    0x0000FF00
+#define AR_PHY_EXTCHN_PWRTHR1_ANT_DIV_ALT_ANT_MINGAINIDX_S  8
 #define AR_PHY_EXT_MINCCA_PWR   0x01FF0000
 #define AR_PHY_EXT_MINCCA_PWR_S 16
 #define AR_PHY_EXT_CYCPWR_THR1 0x0000FE00L
index 64ff8e61c243b06a3b724a16eb0f29a8a953dce1..fa543a62e8398e4cec46611f329df643ba48b03f 100644 (file)
@@ -314,6 +314,7 @@ struct ath9k_ops_config {
        u32 xlna_gpio;
        u32 ant_ctrl_comm2g_switch_enable;
        bool xatten_margin_cfg;
+       bool alt_mingainidx;
 };
 
 enum ath9k_int {
index abf1eb5d97ad9103fb06d1f3357ef61c76d6e9ba..19b46c7e361636e0debdf74332ada2c1e8c3b9d4 100644 (file)
@@ -534,6 +534,7 @@ static void ath9k_init_platform(struct ath_softc *sc)
                               ATH9K_PCI_CUS230)) {
                ah->config.xlna_gpio = 9;
                ah->config.xatten_margin_cfg = true;
+               ah->config.alt_mingainidx = true;
                ah->config.ant_ctrl_comm2g_switch_enable = 0x000BBB88;
                sc->ant_comb.low_rssi_thresh = 20;
                sc->ant_comb.fast_div_bias = 3;