perf: arm_spe: Use feature numbering for PMSEVFR_EL1 defines

Similar to commit 121a8fc088f1 ("arm64/sysreg: Use feature numbering for
PMU and SPE revisions") use feature numbering instead of architecture
versions for the PMSEVFR_EL1 Res0 defines.

Tested-by: James Clark <james.clark@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v4-1-327f860daf28@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 1312fb48f18b5a510358b9fe55a8e9f9888f5e92..c4ce16333750cada8c471df7f42cb7a390f4d40f 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -273,11 +273,11 @@
 #define SYS_PMSFCR_EL1_ST_SHIFT                18
 
 #define SYS_PMSEVFR_EL1                        sys_reg(3, 0, 9, 9, 5)
-#define SYS_PMSEVFR_EL1_RES0_8_2       \
+#define PMSEVFR_EL1_RES0_IMP   \
        (GENMASK_ULL(47, 32) | GENMASK_ULL(23, 16) | GENMASK_ULL(11, 8) |\
         BIT_ULL(6) | BIT_ULL(4) | BIT_ULL(2) | BIT_ULL(0))
-#define SYS_PMSEVFR_EL1_RES0_8_3       \
-       (SYS_PMSEVFR_EL1_RES0_8_2 & ~(BIT_ULL(18) | BIT_ULL(17) | BIT_ULL(11)))
+#define PMSEVFR_EL1_RES0_V1P1  \
+       (PMSEVFR_EL1_RES0_IMP & ~(BIT_ULL(18) | BIT_ULL(17) | BIT_ULL(11)))
 
 #define SYS_PMSLATFR_EL1               sys_reg(3, 0, 9, 9, 6)
 #define SYS_PMSLATFR_EL1_MINLAT_SHIFT  0

diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c
index 00e3a637f7b6320222a9b3a8ef431613ca1dae15..65cf93dcc8ee637988c37d99a9c77171cf09f21f 100644 (file)
--- a/drivers/perf/arm_spe_pmu.c
+++ b/drivers/perf/arm_spe_pmu.c
@@ -677,11 +677,11 @@ static u64 arm_spe_pmsevfr_res0(u16 pmsver)
 {
        switch (pmsver) {
        case ID_AA64DFR0_EL1_PMSVer_IMP:
-               return SYS_PMSEVFR_EL1_RES0_8_2;
+               return PMSEVFR_EL1_RES0_IMP;
        case ID_AA64DFR0_EL1_PMSVer_V1P1:
        /* Return the highest version we support in default */
        default:
-               return SYS_PMSEVFR_EL1_RES0_8_3;
+               return PMSEVFR_EL1_RES0_V1P1;
        }
 }