PCI/ATS: Use FIELD_GET()

Use FIELD_GET() to remove dependences on the field position, i.e., the
shift value.  No functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-6-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index f9cc2e10b676a96a0a61701751fc6b12791405fc..c570892b209095d29d90e5597fbc7836869d0dc4 100644 (file)
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -9,6 +9,7 @@
  * Copyright (C) 2011 Advanced Micro Devices,
  */
 
+#include <linux/bitfield.h>
 #include <linux/export.h>
 #include <linux/pci-ats.h>
 #include <linux/pci.h>
@@ -480,8 +481,6 @@ int pci_pasid_features(struct pci_dev *pdev)
 }
 EXPORT_SYMBOL_GPL(pci_pasid_features);
 
-#define PASID_NUMBER_SHIFT     8
-#define PASID_NUMBER_MASK      (0x1f << PASID_NUMBER_SHIFT)
 /**
  * pci_max_pasids - Get maximum number of PASIDs supported by device
  * @pdev: PCI device structure
@@ -503,9 +502,7 @@ int pci_max_pasids(struct pci_dev *pdev)
 
        pci_read_config_word(pdev, pasid + PCI_PASID_CAP, &supported);
 
-       supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
-
-       return (1 << supported);
+       return (1 << FIELD_GET(PCI_PASID_CAP_WIDTH, supported));
 }
 EXPORT_SYMBOL_GPL(pci_max_pasids);
 #endif /* CONFIG_PCI_PASID */

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index f35d73efe223796f418946c94787c6f36814ab93..4f226db4c1dcef2e4c76df5f27be7987266f69c6 100644 (file)
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -932,6 +932,7 @@
 #define PCI_PASID_CAP          0x04    /* PASID feature register */
 #define  PCI_PASID_CAP_EXEC    0x0002  /* Exec permissions Supported */
 #define  PCI_PASID_CAP_PRIV    0x0004  /* Privilege Mode Supported */
+#define  PCI_PASID_CAP_WIDTH   0x1f00
 #define PCI_PASID_CTRL         0x06    /* PASID control register */
 #define  PCI_PASID_CTRL_ENABLE 0x0001  /* Enable bit */
 #define  PCI_PASID_CTRL_EXEC   0x0002  /* Exec permissions Enable */