arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 3 Dec 2024 10:49:38 +0000 (10:49 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 13 Dec 2024 10:20:09 +0000 (11:20 +0100)
Add initial support for the RZ/G3E SMARC SoM with 4GB memory,
audio_extal, qextal and rtxin clks.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241203105005.103927-12-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi [new file with mode: 0644]

diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
new file mode 100644 (file)
index 0000000..6b583ae
--- /dev/null
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the R9A09G047E57 SMARC SoM board.
+ *
+ * Copyright (C) 2024 Renesas Electronics Corp.
+ */
+
+/ {
+       compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
+
+       memory@48000000 {
+               device_type = "memory";
+               /* First 128MB is reserved for secure area. */
+               reg = <0x0 0x48000000 0x0 0xf8000000>;
+       };
+};
+
+&audio_extal_clk {
+       clock-frequency = <48000000>;
+};
+
+&qextal_clk {
+       clock-frequency = <24000000>;
+};
+
+&rtxin_clk {
+       clock-frequency = <32768>;
+};