drm/xe/xe2: Follow XeHPC for TLB invalidation

Register GUC_TLB_INV_CR is gone in xe2. When GuC submission is not yet
enabled, make sure to follow the same path as XeHPC.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index ec7bbb1dc2958761af926377c8d50a1c0de53b42..06732461246dc9ccc1cdc5fb4aefcef0b2bf5fb2 100644 (file)
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -263,7 +263,7 @@ static void ggtt_invalidate_gt_tlb(struct xe_gt *gt)
        } else if (xe_device_uc_enabled(gt_to_xe(gt))) {
                struct xe_device *xe = gt_to_xe(gt);
 
-               if (xe->info.platform == XE_PVC) {
+               if (xe->info.platform == XE_PVC || GRAPHICS_VER(xe) >= 20) {
                        xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC1,
                                        PVC_GUC_TLB_INV_DESC1_INVALIDATE);
                        xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC0,