ARM: dts: k2e-netcp: add cpts refclk_mux node

KeyStone 66AK2E 1G Ethernet Switch Subsystems, can control an external
multiplexer that selects one of up to 32 clocks for time sync reference
(RFTCLK) clock. This feature can be configured through CPTS_RFTCLK_SEL
register (offset: x08) in CPTS module and modelled as multiplexer clock.

Hence, add cpts-refclk-mux clock node which allows to mux one of SYSCLK2,
SYSCLK3, TIMI0, TIMI1, TSIPCLKA, TSREFCLK, TSIPCLKB clocks as CPTS
reference clock [1] and group all CPTS properties under "cpts" subnode.

[1] http://www.ti.com/lit/gpn/66ak2e05
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>

diff --git a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
index 1db17ec744b1155d165d74c00e5dc725ff37b976..ad15e77874b1298da4dbcf7b80ac4d5a6d3bca5a 100644 (file)
--- a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
@@ -135,8 +135,8 @@ netcp: netcp@24000000 {
        /* NetCP address range */
        ranges = <0 0x24000000 0x1000000>;
 
-       clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>;
-       clock-names = "pa_clk", "ethss_clk", "cpts";
+       clocks = <&clkpa>, <&clkcpgmac>;
+       clock-names = "pa_clk", "ethss_clk";
        dma-coherent;
 
        ti,navigator-dmas = <&dma_gbe 0>,
@@ -156,6 +156,23 @@ netcp: netcp@24000000 {
                        tx-queue = <896>;
                        tx-channel = "nettx";
 
+                       cpts {
+                               clocks = <&cpts_refclk_mux>;
+                               clock-names = "cpts";
+
+                               cpts_refclk_mux: cpts-refclk-mux {
+                                       #clock-cells = <0>;
+                                       clocks = <&chipclk12>, <&chipclk13>,
+                                                <&timi0>, <&timi1>,
+                                                <&tsipclka>, <&tsrefclk>,
+                                                <&tsipclkb>;
+                                       ti,mux-tbl = <0x0>, <0x1>, <0x2>,
+                                               <0x3>, <0x4>, <0x8>, <0xC>;
+                                       assigned-clocks = <&cpts_refclk_mux>;
+                                       assigned-clock-parents = <&chipclk12>;
+                               };
+                       };
+
                        interfaces {
                                gbe0: interface-0 {
                                        slave-port = <0>;