drm/i915: Update trans_vrr_ctl flag when cmrr is computed

Add/update trans_vrr_ctl flag when crtc_state->cmrr.enable
is set, With this commit setting the stage for subsequent
CMRR enablement.

--v2:
- Check pipe active state in cmrr enabling. [Jani]
- Remove usage of bitwise OR on booleans. [Jani]
- Revert unrelated changes. [Jani]
- Update intel_vrr_enable, vrr and cmrr enable conditions. [Jani]
- Simplify whole if-ladder in intel_vrr_enable. [Jani]
- Revert patch restructuring mistakes in intel_vrr_get_config. [Jani]

--v3:
- Check pipe active state in cmrr disabling.[Jani]
- Correct messed up condition in intel_vrr_enable. [Jani]

--v4:
- Removing RFC tag.

--v5:
- CMRR handling in co-existatnce of LRR and DRRS.

--v7:
- Rebase on top of AS SDP merge.

--v8:
- Remove cmrr_enabling/disabling and update commit message. (Ankit)

--v9:
- Revert removed line(Ankit).

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240610072203.24956-5-mitulkumar.ajitkumar.golani@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index d2f854d9d18b0f3106c7c6f91a2e2245585dc93b..19b364074de031b231171cced1d9c57a0006184e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -282,8 +282,14 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
                               VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
                               VRR_VSYNC_START(crtc_state->vrr.vsync_start));
 
-       intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder),
-                      VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
+       if (crtc_state->cmrr.enable) {
+               intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder),
+                              VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE |
+                              trans_vrr_ctl(crtc_state));
+       } else {
+               intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder),
+                              VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
+       }
 }
 
 void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
index 20267ec12f5aef8f8fbde3e4e3202325a8395cad..6ed0e0dc97e76d2264db57326ac594abde500a5b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
@@ -122,4 +122,6 @@
 #define _TRANS_CMRR_N_HI_A                     0x604FC
 #define TRANS_CMRR_N_HI(dev_priv, trans)        _MMIO_TRANS2(dev_priv, trans, _TRANS_CMRR_N_HI_A)
 
+#define VRR_CTL_CMRR_ENABLE                    REG_BIT(27)
+
 #endif /* __INTEL_VRR_REGS__ */