drm/msm/dpu: remove DPU_CTL_SPLIT_DISPLAY from SAR2130P CTL blocks
authorDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Wed, 7 May 2025 13:29:06 +0000 (16:29 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Mon, 12 May 2025 16:18:49 +0000 (19:18 +0300)
Follow the changes in the commit a2649952f66e ("drm/msm/dpu: remove
DPU_CTL_SPLIT_DISPLAY from CTL blocks on DPU >= 5.0") and remove
DPU_CTL_SPLIT_DISPLAY from the CTL blocks on the SAR2130P platform.
Single CTL is used for all interfaces used by a single path

Fixes: 178575173472 ("drm/msm/dpu: add catalog entry for SAR2130P")
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/651883/
Link: https://lore.kernel.org/r/20250506-dpu-sar2130p-no-split-display-v1-1-b619c0fddea5@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h

index 22dd16c6e210e9520ecb7a851bee402032fa1ee2..5667d055fbd1d8125c3231302daa3e05de5944c9 100644 (file)
@@ -27,17 +27,16 @@ static const struct dpu_mdp_cfg sar2130p_mdp = {
        },
 };
 
-/* FIXME: get rid of DPU_CTL_SPLIT_DISPLAY in favour of proper ACTIVE_CTL support */
 static const struct dpu_ctl_cfg sar2130p_ctl[] = {
        {
                .name = "ctl_0", .id = CTL_0,
                .base = 0x15000, .len = 0x290,
-               .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY),
+               .features = CTL_SM8550_MASK,
                .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
        }, {
                .name = "ctl_1", .id = CTL_1,
                .base = 0x16000, .len = 0x290,
-               .features = CTL_SM8550_MASK | BIT(DPU_CTL_SPLIT_DISPLAY),
+               .features = CTL_SM8550_MASK,
                .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10),
        }, {
                .name = "ctl_2", .id = CTL_2,