arm64: dts: ls2088ardb: add PHY nodes for the AQR405 PHYs
authorIoana Ciornei <ioana.ciornei@nxp.com>
Fri, 30 Oct 2020 11:35:52 +0000 (13:35 +0200)
committerShawn Guo <shawnguo@kernel.org>
Mon, 30 Nov 2020 14:30:29 +0000 (22:30 +0800)
Annotate the EMDIO2 node and describe the other 4 10GBASER PHYs found on
the LS2088ARDB board. Also, add phy-handles for DPMACs 5-8 to their
associated PHY.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts

index a4b0dcab6e8e955e09f535badd5da41830982bfb..854f604049ca8bf66094dbb5640ed7894c024909 100644 (file)
        phy-connection-type = "10gbase-r";
 };
 
+&dpmac5 {
+       phy-handle = <&mdio2_phy1>;
+       phy-connection-type = "10gbase-r";
+};
+
+&dpmac6 {
+       phy-handle = <&mdio2_phy2>;
+       phy-connection-type = "10gbase-r";
+};
+
+&dpmac7 {
+       phy-handle = <&mdio2_phy3>;
+       phy-connection-type = "10gbase-r";
+};
+
+&dpmac8 {
+       phy-handle = <&mdio2_phy4>;
+       phy-connection-type = "10gbase-r";
+};
+
 &emdio1 {
        status = "okay";
 
                reg = <0x13>;
        };
 };
+
+&emdio2 {
+       status = "okay";
+
+       mdio2_phy1: ethernet-phy@0 {
+               compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
+               reg = <0x0>;
+       };
+
+       mdio2_phy2: ethernet-phy@1 {
+               compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
+               reg = <0x1>;
+       };
+
+       mdio2_phy3: ethernet-phy@2 {
+               compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
+               reg = <0x2>;
+       };
+
+       mdio2_phy4: ethernet-phy@3 {
+               compatible = "ethernet-phy-id03a1.b4b0", "ethernet-phy-ieee802.3-c45";
+               reg = <0x3>;
+       };
+};