Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git

ath.git patches for v5.12. Major changes:

ath9k

* more robust encryption key cache management

diff --combined drivers/net/wireless/ath/ath11k/dp_rx.c
index 920e5026a635fceabfa6f3e388f034dbe886d932,1b6e663ae784ea4e01c9658e400540acb5520add..42328a06107b315e054ef07ed5ac50a97c5d6ed2
--- 1/drivers/net/wireless/ath/ath11k/dp_rx.c
--- 2/drivers/net/wireless/ath/ath11k/dp_rx.c
+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
@@@ -1163,7 -1163,7 +1163,7 @@@ int ath11k_dp_peer_rx_pn_replay_config(
                }
        }
  
-       spin_unlock_bh(&ar->ab->base_lock);
+       spin_unlock_bh(&ab->base_lock);
  
        return ret;
  }
@@@ -2294,7 -2294,6 +2294,7 @@@ static void ath11k_dp_rx_h_ppdu(struct 
  {
        u8 channel_num;
        u32 center_freq;
 +      struct ieee80211_channel *channel;
  
        rx_status->freq = 0;
        rx_status->rate_idx = 0;
@@@ -2315,12 -2314,9 +2315,12 @@@
                rx_status->band = NL80211_BAND_5GHZ;
        } else {
                spin_lock_bh(&ar->data_lock);
 -              rx_status->band = ar->rx_channel->band;
 -              channel_num =
 -                      ieee80211_frequency_to_channel(ar->rx_channel->center_freq);
 +              channel = ar->rx_channel;
 +              if (channel) {
 +                      rx_status->band = channel->band;
 +                      channel_num =
 +                              ieee80211_frequency_to_channel(channel->center_freq);
 +              }
                spin_unlock_bh(&ar->data_lock);
                ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "rx_desc: ",
                                rx_desc, sizeof(struct hal_rx_desc));

diff --combined drivers/net/wireless/ath/ath11k/pci.c
index 20b415cd96c4aadaa233aed4cbabbae6996c4201,5587a9926cc60bad9228b3a515ce53c085037852..78478b2b3ba5766fd24e45cd396e7dae0addfc6c
--- 1/drivers/net/wireless/ath/ath11k/pci.c
--- 2/drivers/net/wireless/ath/ath11k/pci.c
+++ b/drivers/net/wireless/ath/ath11k/pci.c
@@@ -274,7 -274,7 +274,7 @@@ static int ath11k_pci_fix_l1ss(struct a
                                      PCIE_QSERDES_COM_SYSCLK_EN_SEL_REG,
                                      PCIE_QSERDES_COM_SYSCLK_EN_SEL_VAL,
                                      PCIE_QSERDES_COM_SYSCLK_EN_SEL_MSK);
 -      if (!ret) {
 +      if (ret) {
                ath11k_warn(ab, "failed to set sysclk: %d\n", ret);
                return ret;
        }
@@@ -283,7 -283,7 +283,7 @@@
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG1_REG,
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG1_VAL,
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG_MSK);
 -      if (!ret) {
 +      if (ret) {
                ath11k_warn(ab, "failed to set dtct config1 error: %d\n", ret);
                return ret;
        }
@@@ -292,7 -292,7 +292,7 @@@
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG2_REG,
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG2_VAL,
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG_MSK);
 -      if (!ret) {
 +      if (ret) {
                ath11k_warn(ab, "failed to set dtct config2: %d\n", ret);
                return ret;
        }
@@@ -301,7 -301,7 +301,7 @@@
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG4_REG,
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG4_VAL,
                                      PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG_MSK);
 -      if (!ret) {
 +      if (ret) {
                ath11k_warn(ab, "failed to set dtct config4: %d\n", ret);
                return ret;
        }
@@@ -328,7 -328,7 +328,7 @@@ static void ath11k_pci_enable_ltssm(str
        ath11k_dbg(ab, ATH11K_DBG_PCI, "pci ltssm 0x%x\n", val);
  
        val = ath11k_pci_read32(ab, GCC_GCC_PCIE_HOT_RST);
-       val |= GCC_GCC_PCIE_HOT_RST_VAL | 0x10;
+       val |= GCC_GCC_PCIE_HOT_RST_VAL;
        ath11k_pci_write32(ab, GCC_GCC_PCIE_HOT_RST, val);
        val = ath11k_pci_read32(ab, GCC_GCC_PCIE_HOT_RST);
  
@@@ -886,32 -886,6 +886,32 @@@ static void ath11k_pci_free_region(stru
                pci_disable_device(pci_dev);
  }
  
 +static void ath11k_pci_aspm_disable(struct ath11k_pci *ab_pci)
 +{
 +      struct ath11k_base *ab = ab_pci->ab;
 +
 +      pcie_capability_read_word(ab_pci->pdev, PCI_EXP_LNKCTL,
 +                                &ab_pci->link_ctl);
 +
 +      ath11k_dbg(ab, ATH11K_DBG_PCI, "pci link_ctl 0x%04x L0s %d L1 %d\n",
 +                 ab_pci->link_ctl,
 +                 u16_get_bits(ab_pci->link_ctl, PCI_EXP_LNKCTL_ASPM_L0S),
 +                 u16_get_bits(ab_pci->link_ctl, PCI_EXP_LNKCTL_ASPM_L1));
 +
 +      /* disable L0s and L1 */
 +      pcie_capability_write_word(ab_pci->pdev, PCI_EXP_LNKCTL,
 +                                 ab_pci->link_ctl & ~PCI_EXP_LNKCTL_ASPMC);
 +
 +      set_bit(ATH11K_PCI_ASPM_RESTORE, &ab_pci->flags);
 +}
 +
 +static void ath11k_pci_aspm_restore(struct ath11k_pci *ab_pci)
 +{
 +      if (test_and_clear_bit(ATH11K_PCI_ASPM_RESTORE, &ab_pci->flags))
 +              pcie_capability_write_word(ab_pci->pdev, PCI_EXP_LNKCTL,
 +                                         ab_pci->link_ctl);
 +}
 +
  static int ath11k_pci_power_up(struct ath11k_base *ab)
  {
        struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);
@@@ -921,11 -895,6 +921,11 @@@
        clear_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags);
        ath11k_pci_sw_reset(ab_pci->ab, true);
  
 +      /* Disable ASPM during firmware download due to problems switching
 +       * to AMSS state.
 +       */
 +      ath11k_pci_aspm_disable(ab_pci);
 +
        ret = ath11k_mhi_start(ab_pci);
        if (ret) {
                ath11k_err(ab, "failed to start mhi: %d\n", ret);
@@@ -939,9 -908,6 +939,9 @@@ static void ath11k_pci_power_down(struc
  {
        struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);
  
 +      /* restore aspm in case firmware bootup fails */
 +      ath11k_pci_aspm_restore(ab_pci);
 +
        ath11k_pci_force_wake(ab_pci->ab);
        ath11k_mhi_stop(ab_pci);
        clear_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags);
@@@ -999,8 -965,6 +999,8 @@@ static int ath11k_pci_start(struct ath1
  
        set_bit(ATH11K_PCI_FLAG_INIT_DONE, &ab_pci->flags);
  
 +      ath11k_pci_aspm_restore(ab_pci);
 +
        ath11k_pci_ce_irqs_enable(ab);
        ath11k_ce_rx_post_buf(ab);