ARM: dts: amlogic: meson8b: switch to the new PWM controller binding

Use the new PWM controller binding which now relies on passing all
clock inputs available on the SoC (instead of passing the "wanted"
clock input for a given board).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241227212514.1376682-3-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/arch/arm/boot/dts/amlogic/meson8b-ec100.dts b/arch/arm/boot/dts/amlogic/meson8b-ec100.dts
index 18ea6592b7d74d0cb7dd97fc7112301aa23680d9..23699954809404e24d929fd1127a6a6f006ab694 100644 (file)
--- a/arch/arm/boot/dts/amlogic/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/amlogic/meson8b-ec100.dts
@@ -443,8 +443,6 @@
        status = "okay";
        pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
        pinctrl-names = "default";
-       clocks = <&xtal>, <&xtal>;
-       clock-names = "clkin0", "clkin1";
 };
 
 &rtc {

diff --git a/arch/arm/boot/dts/amlogic/meson8b-mxq.dts b/arch/arm/boot/dts/amlogic/meson8b-mxq.dts
index fb28cb330f175a075c2e8214dcac77a1d9128efc..0bca0b33eea2a5fb05ef6b1f9fe1cc4219287eda 100644 (file)
--- a/arch/arm/boot/dts/amlogic/meson8b-mxq.dts
+++ b/arch/arm/boot/dts/amlogic/meson8b-mxq.dts
@@ -162,8 +162,6 @@
        status = "okay";
        pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
        pinctrl-names = "default";
-       clocks = <&xtal>, <&xtal>;
-       clock-names = "clkin0", "clkin1";
 };
 
 &uart_AO {

diff --git a/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts b/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts
index 2aa012f38a3bf5c38472ef133f58c90ae52b81b7..1cd2093202caa645aa64d11656034e9653182902 100644 (file)
--- a/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts
@@ -347,8 +347,6 @@
        status = "okay";
        pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
        pinctrl-names = "default";
-       clocks = <&xtal>, <&xtal>;
-       clock-names = "clkin0", "clkin1";
 };
 
 &rtc {

diff --git a/arch/arm/boot/dts/amlogic/meson8b.dtsi b/arch/arm/boot/dts/amlogic/meson8b.dtsi
index 9e02a97f86a0ef76ac856a8983f4aea0234ec859..0876611ce26a8c33489a0a031ec302d0569767f1 100644 (file)
--- a/arch/arm/boot/dts/amlogic/meson8b.dtsi
+++ b/arch/arm/boot/dts/amlogic/meson8b.dtsi
@@ -403,8 +403,12 @@
        };
 
        pwm_ef: pwm@86c0 {
-               compatible = "amlogic,meson8b-pwm";
+               compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
                reg = <0x86c0 0x10>;
+               clocks = <&xtal>,
+                        <>, /* unknown/untested, the datasheet calls it "Video PLL" */
+                        <&clkc CLKID_FCLK_DIV4>,
+                        <&clkc CLKID_FCLK_DIV3>;
                #pwm-cells = <3>;
                status = "disabled";
        };
@@ -674,11 +678,19 @@
 };
 
 &pwm_ab {
-       compatible = "amlogic,meson8b-pwm";
+       compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
+       clocks = <&xtal>,
+                <>, /* unknown/untested, the datasheet calls it "Video PLL" */
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>;
 };
 
 &pwm_cd {
-       compatible = "amlogic,meson8b-pwm";
+       compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
+       clocks = <&xtal>,
+                <>, /* unknown/untested, the datasheet calls it "Video PLL" */
+                <&clkc CLKID_FCLK_DIV4>,
+                <&clkc CLKID_FCLK_DIV3>;
 };
 
 &rtc {