gpio: Bulk conversion to generic_handle_domain_irq()
authorMarc Zyngier <maz@kernel.org>
Tue, 4 May 2021 16:42:18 +0000 (17:42 +0100)
committerMarc Zyngier <maz@kernel.org>
Thu, 12 Aug 2021 10:39:38 +0000 (11:39 +0100)
Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
43 files changed:
drivers/gpio/gpio-104-dio-48e.c
drivers/gpio/gpio-104-idi-48.c
drivers/gpio/gpio-104-idio-16.c
drivers/gpio/gpio-altera.c
drivers/gpio/gpio-aspeed-sgpio.c
drivers/gpio/gpio-aspeed.c
drivers/gpio/gpio-ath79.c
drivers/gpio/gpio-bcm-kona.c
drivers/gpio/gpio-brcmstb.c
drivers/gpio/gpio-cadence.c
drivers/gpio/gpio-davinci.c
drivers/gpio/gpio-dln2.c
drivers/gpio/gpio-em.c
drivers/gpio/gpio-ep93xx.c
drivers/gpio/gpio-ftgpio010.c
drivers/gpio/gpio-hisi.c
drivers/gpio/gpio-hlwd.c
drivers/gpio/gpio-merrifield.c
drivers/gpio/gpio-mpc8xxx.c
drivers/gpio/gpio-mt7621.c
drivers/gpio/gpio-mxc.c
drivers/gpio/gpio-mxs.c
drivers/gpio/gpio-omap.c
drivers/gpio/gpio-pci-idio-16.c
drivers/gpio/gpio-pcie-idio-24.c
drivers/gpio/gpio-pl061.c
drivers/gpio/gpio-pxa.c
drivers/gpio/gpio-rcar.c
drivers/gpio/gpio-rda.c
drivers/gpio/gpio-realtek-otto.c
drivers/gpio/gpio-sch.c
drivers/gpio/gpio-sodaville.c
drivers/gpio/gpio-sprd.c
drivers/gpio/gpio-tb10x.c
drivers/gpio/gpio-tegra.c
drivers/gpio/gpio-tegra186.c
drivers/gpio/gpio-tqmx86.c
drivers/gpio/gpio-vf610.c
drivers/gpio/gpio-ws16c48.c
drivers/gpio/gpio-xgs-iproc.c
drivers/gpio/gpio-xilinx.c
drivers/gpio/gpio-xlp.c
drivers/gpio/gpio-zynq.c

index 71c0bea34d7b8df4d3cb06bcde0fd8693a2fdb72..6bf41040c41f52019d88811aecdc71bd5c16abc1 100644 (file)
@@ -336,8 +336,8 @@ static irqreturn_t dio48e_irq_handler(int irq, void *dev_id)
        unsigned long gpio;
 
        for_each_set_bit(gpio, &irq_mask, 2)
-               generic_handle_irq(irq_find_mapping(chip->irq.domain,
-                       19 + gpio*24));
+               generic_handle_domain_irq(chip->irq.domain,
+                                         19 + gpio*24);
 
        raw_spin_lock(&dio48egpio->lock);
 
index b132afaf7d99939ad95c89021cf9a8120d845590..34be7dd9f5b9764f79b1cddda9422307a34440c7 100644 (file)
@@ -223,8 +223,8 @@ static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)
                for_each_set_bit(bit_num, &irq_mask, 8) {
                        gpio = bit_num + boundary * 8;
 
-                       generic_handle_irq(irq_find_mapping(chip->irq.domain,
-                               gpio));
+                       generic_handle_domain_irq(chip->irq.domain,
+                                                 gpio);
                }
        }
 
index 55b40299ebfa1ba83f899b2dd6ae2b5d72997de1..c68ed1a135fa6c0d06488a238e40609d7332d528 100644 (file)
@@ -208,7 +208,7 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
        int gpio;
 
        for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
-               generic_handle_irq(irq_find_mapping(chip->irq.domain, gpio));
+               generic_handle_domain_irq(chip->irq.domain, gpio);
 
        raw_spin_lock(&idio16gpio->lock);
 
index b7932ecc3b613c1dc996188158dec8e659bcd16b..b59fae993626baa87459495498195e39f2c1dfdb 100644 (file)
@@ -201,9 +201,8 @@ static void altera_gpio_irq_edge_handler(struct irq_desc *desc)
              (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) &
              readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) {
                writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP);
-               for_each_set_bit(i, &status, mm_gc->gc.ngpio) {
-                       generic_handle_irq(irq_find_mapping(irqdomain, i));
-               }
+               for_each_set_bit(i, &status, mm_gc->gc.ngpio)
+                       generic_handle_domain_irq(irqdomain, i);
        }
 
        chained_irq_exit(chip, desc);
@@ -228,9 +227,9 @@ static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc)
        status = readl(mm_gc->regs + ALTERA_GPIO_DATA);
        status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
 
-       for_each_set_bit(i, &status, mm_gc->gc.ngpio) {
-               generic_handle_irq(irq_find_mapping(irqdomain, i));
-       }
+       for_each_set_bit(i, &status, mm_gc->gc.ngpio)
+               generic_handle_domain_irq(irqdomain, i);
+
        chained_irq_exit(chip, desc);
 }
 
index 64e54f8c30d2d6f4371d8f1fc6ce16d54b4abae0..a99ece15db95ed2a9c5b0b9a4dbdc975dac1df24 100644 (file)
@@ -392,7 +392,7 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *desc)
        struct gpio_chip *gc = irq_desc_get_handler_data(desc);
        struct irq_chip *ic = irq_desc_get_chip(desc);
        struct aspeed_sgpio *data = gpiochip_get_data(gc);
-       unsigned int i, p, girq;
+       unsigned int i, p;
        unsigned long reg;
 
        chained_irq_enter(ic, desc);
@@ -402,11 +402,8 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *desc)
 
                reg = ioread32(bank_reg(data, bank, reg_irq_status));
 
-               for_each_set_bit(p, &reg, 32) {
-                       girq = irq_find_mapping(gc->irq.domain, i * 32 + p);
-                       generic_handle_irq(girq);
-               }
-
+               for_each_set_bit(p, &reg, 32)
+                       generic_handle_domain_irq(gc->irq.domain, i * 32 + p);
        }
 
        chained_irq_exit(ic, desc);
index b966f5e28ebffd5f3a97bcd43f1001156641b43d..3c8f20c57695fa0fd6315b282cb1102c1e8b3feb 100644 (file)
@@ -661,7 +661,7 @@ static void aspeed_gpio_irq_handler(struct irq_desc *desc)
        struct gpio_chip *gc = irq_desc_get_handler_data(desc);
        struct irq_chip *ic = irq_desc_get_chip(desc);
        struct aspeed_gpio *data = gpiochip_get_data(gc);
-       unsigned int i, p, girq, banks;
+       unsigned int i, p, banks;
        unsigned long reg;
        struct aspeed_gpio *gpio = gpiochip_get_data(gc);
 
@@ -673,11 +673,8 @@ static void aspeed_gpio_irq_handler(struct irq_desc *desc)
 
                reg = ioread32(bank_reg(data, bank, reg_irq_status));
 
-               for_each_set_bit(p, &reg, 32) {
-                       girq = irq_find_mapping(gc->irq.domain, i * 32 + p);
-                       generic_handle_irq(girq);
-               }
-
+               for_each_set_bit(p, &reg, 32)
+                       generic_handle_domain_irq(gc->irq.domain, i * 32 + p);
        }
 
        chained_irq_exit(ic, desc);
index 9b780dc5d390f949598097e551f0fb5457fb96a5..3958c6d97639d5b45bad53ca6a4e70faa548018a 100644 (file)
@@ -204,11 +204,8 @@ static void ath79_gpio_irq_handler(struct irq_desc *desc)
 
        raw_spin_unlock_irqrestore(&ctrl->lock, flags);
 
-       if (pending) {
-               for_each_set_bit(irq, &pending, gc->ngpio)
-                       generic_handle_irq(
-                               irq_linear_revmap(gc->irq.domain, irq));
-       }
+       for_each_set_bit(irq, &pending, gc->ngpio)
+               generic_handle_domain_irq(gc->irq.domain, irq);
 
        chained_irq_exit(irqchip, desc);
 }
index 1e6b427f2c4a2db480d27fea63fe41c068001c9a..d329a143f5ec9480cea3809d8cc918ff91051056 100644 (file)
@@ -466,9 +466,6 @@ static void bcm_kona_gpio_irq_handler(struct irq_desc *desc)
                    (~(readl(reg_base + GPIO_INT_MASK(bank_id)))))) {
                for_each_set_bit(bit, &sta, 32) {
                        int hwirq = GPIO_PER_BANK * bank_id + bit;
-                       int child_irq =
-                               irq_find_mapping(bank->kona_gpio->irq_domain,
-                                                hwirq);
                        /*
                         * Clear interrupt before handler is called so we don't
                         * miss any interrupt occurred during executing them.
@@ -476,7 +473,8 @@ static void bcm_kona_gpio_irq_handler(struct irq_desc *desc)
                        writel(readl(reg_base + GPIO_INT_STATUS(bank_id)) |
                               BIT(bit), reg_base + GPIO_INT_STATUS(bank_id));
                        /* Invoke interrupt handler */
-                       generic_handle_irq(child_irq);
+                       generic_handle_domain_irq(bank->kona_gpio->irq_domain,
+                                                 hwirq);
                }
        }
 
index fcfc1a1f1a5c12374cd6ef57363d5be9398a5fcd..74b7c91c3d1aeefe8596cfa9da7e4b4d8681e8ba 100644 (file)
@@ -277,15 +277,14 @@ static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)
        unsigned long status;
 
        while ((status = brcmstb_gpio_get_active_irqs(bank))) {
-               unsigned int irq, offset;
+               unsigned int offset;
 
                for_each_set_bit(offset, &status, 32) {
                        if (offset >= bank->width)
                                dev_warn(&priv->pdev->dev,
                                         "IRQ for invalid GPIO (bank=%d, offset=%d)\n",
                                         bank->id, offset);
-                       irq = irq_linear_revmap(domain, hwbase + offset);
-                       generic_handle_irq(irq);
+                       generic_handle_domain_irq(domain, hwbase + offset);
                }
        }
 }
index 4ab3fcd9b9ba6e41a2aca13a0e747c475a9a87ff..562f8f7e7d1fc2dd62ea293673203c92b7c89aef 100644 (file)
@@ -133,7 +133,7 @@ static void cdns_gpio_irq_handler(struct irq_desc *desc)
                ~ioread32(cgpio->regs + CDNS_GPIO_IRQ_MASK);
 
        for_each_set_bit(hwirq, &status, chip->ngpio)
-               generic_handle_irq(irq_find_mapping(chip->irq.domain, hwirq));
+               generic_handle_domain_irq(chip->irq.domain, hwirq);
 
        chained_irq_exit(irqchip, desc);
 }
index 6f2138503726a7348d2ed31c03c1ba4f9d3d42d6..cb5afaa7ed482b5bacade41fb583b7b5606a9d41 100644 (file)
@@ -369,8 +369,7 @@ static void gpio_irq_handler(struct irq_desc *desc)
                         */
                        hw_irq = (bank_num / 2) * 32 + bit;
 
-                       generic_handle_irq(
-                               irq_find_mapping(d->irq_domain, hw_irq));
+                       generic_handle_domain_irq(d->irq_domain, hw_irq);
                }
        }
        chained_irq_exit(irq_desc_get_chip(desc), desc);
index 4c5f6d0c8d745d8455cd70ba47628f37f4214ff8..026903e3ef54357914feced67373c86687c44a82 100644 (file)
@@ -395,7 +395,7 @@ static struct irq_chip dln2_gpio_irqchip = {
 static void dln2_gpio_event(struct platform_device *pdev, u16 echo,
                            const void *data, int len)
 {
-       int pin, irq;
+       int pin, ret;
 
        const struct {
                __le16 count;
@@ -416,24 +416,20 @@ static void dln2_gpio_event(struct platform_device *pdev, u16 echo,
                return;
        }
 
-       irq = irq_find_mapping(dln2->gpio.irq.domain, pin);
-       if (!irq) {
-               dev_err(dln2->gpio.parent, "pin %d not mapped to IRQ\n", pin);
-               return;
-       }
-
        switch (dln2->irq_type[pin]) {
        case DLN2_GPIO_EVENT_CHANGE_RISING:
-               if (event->value)
-                       generic_handle_irq(irq);
+               if (!event->value)
+                       return;
                break;
        case DLN2_GPIO_EVENT_CHANGE_FALLING:
-               if (!event->value)
-                       generic_handle_irq(irq);
+               if (event->value)
+                       return;
                break;
-       default:
-               generic_handle_irq(irq);
        }
+
+       ret = generic_handle_domain_irq(dln2->gpio.irq.domain, pin);
+       if (unlikely(ret))
+               dev_err(dln2->gpio.parent, "pin %d not mapped to IRQ\n", pin);
 }
 
 static int dln2_gpio_probe(struct platform_device *pdev)
index 17a243c528adeaf8f1b67c258ee55988310c5eb0..90b336e6ee275e84863e3b879c7fe22a9faac811 100644 (file)
@@ -173,7 +173,7 @@ static irqreturn_t em_gio_irq_handler(int irq, void *dev_id)
        while ((pending = em_gio_read(p, GIO_MST))) {
                offset = __ffs(pending);
                em_gio_write(p, GIO_IIR, BIT(offset));
-               generic_handle_irq(irq_find_mapping(p->irq_domain, offset));
+               generic_handle_domain_irq(p->irq_domain, offset);
                irqs_handled++;
        }
 
index ef148b26b587694a3e298d3a6123933f163c1cf3..2e17797091133119d093d590fbfe8e5e323e1a51 100644 (file)
@@ -128,13 +128,13 @@ static void ep93xx_gpio_ab_irq_handler(struct irq_desc *desc)
         */
        stat = readb(epg->base + EP93XX_GPIO_A_INT_STATUS);
        for_each_set_bit(offset, &stat, 8)
-               generic_handle_irq(irq_find_mapping(epg->gc[0].gc.irq.domain,
-                                                   offset));
+               generic_handle_domain_irq(epg->gc[0].gc.irq.domain,
+                                         offset);
 
        stat = readb(epg->base + EP93XX_GPIO_B_INT_STATUS);
        for_each_set_bit(offset, &stat, 8)
-               generic_handle_irq(irq_find_mapping(epg->gc[1].gc.irq.domain,
-                                                   offset));
+               generic_handle_domain_irq(epg->gc[1].gc.irq.domain,
+                                         offset);
 
        chained_irq_exit(irqchip, desc);
 }
index 4031164780f75a2f6b343932c2347d4f9fc0b677..b90a45c939a4ba0bae1b6f350f0582b65d138666 100644 (file)
@@ -149,8 +149,7 @@ static void ftgpio_gpio_irq_handler(struct irq_desc *desc)
        stat = readl(g->base + GPIO_INT_STAT_RAW);
        if (stat)
                for_each_set_bit(offset, &stat, gc->ngpio)
-                       generic_handle_irq(irq_find_mapping(gc->irq.domain,
-                                                           offset));
+                       generic_handle_domain_irq(gc->irq.domain, offset);
 
        chained_irq_exit(irqchip, desc);
 }
index ad3d4da251606a17703414bc2e0bd667e032db00..3caabef5c7a2ea069a8f9d8dd18cae40d5b1b4c5 100644 (file)
@@ -186,8 +186,8 @@ static void hisi_gpio_irq_handler(struct irq_desc *desc)
 
        chained_irq_enter(irq_c, desc);
        for_each_set_bit(hwirq, &irq_msk, HISI_GPIO_LINE_NUM_MAX)
-               generic_handle_irq(irq_find_mapping(hisi_gpio->chip.irq.domain,
-                                                   hwirq));
+               generic_handle_domain_irq(hisi_gpio->chip.irq.domain,
+                                         hwirq);
        chained_irq_exit(irq_c, desc);
 }
 
index 4a17599f6d44d23db22eb18d6ef9c5a409c10706..641719a96a1a93051b776c07b5638a1727f9410a 100644 (file)
@@ -97,11 +97,8 @@ static void hlwd_gpio_irqhandler(struct irq_desc *desc)
 
        chained_irq_enter(chip, desc);
 
-       for_each_set_bit(hwirq, &pending, 32) {
-               int irq = irq_find_mapping(hlwd->gpioc.irq.domain, hwirq);
-
-               generic_handle_irq(irq);
-       }
+       for_each_set_bit(hwirq, &pending, 32)
+               generic_handle_domain_irq(hlwd->gpioc.irq.domain, hwirq);
 
        chained_irq_exit(chip, desc);
 }
index 22f3ce218f5d8c90a40a1144b52d1c978754d37b..42c4d9d0cd50c42f7c8eca7e31ebd50821f02b56 100644 (file)
@@ -359,12 +359,8 @@ static void mrfld_irq_handler(struct irq_desc *desc)
                /* Only interrupts that are enabled */
                pending &= enabled;
 
-               for_each_set_bit(gpio, &pending, 32) {
-                       unsigned int irq;
-
-                       irq = irq_find_mapping(gc->irq.domain, base + gpio);
-                       generic_handle_irq(irq);
-               }
+               for_each_set_bit(gpio, &pending, 32)
+                       generic_handle_domain_irq(gc->irq.domain, base + gpio);
        }
 
        chained_irq_exit(irqchip, desc);
index 4b9157a69fca01cef1687418094a12a8a6b633e1..d05fd81dca722838b2b9d03bf3e813f60c981218 100644 (file)
@@ -120,7 +120,7 @@ static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
        mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
                & gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
        for_each_set_bit(i, &mask, 32)
-               generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq, 31 - i));
+               generic_handle_domain_irq(mpc8xxx_gc->irq, 31 - i);
 
        return IRQ_HANDLED;
 }
index 82fb20dca53af5cb5bc18c573f9732399047f389..10c0a9bc5ea1bd2e4f69dbe3146620a18450a0c4 100644 (file)
@@ -95,9 +95,7 @@ mediatek_gpio_irq_handler(int irq, void *data)
        pending = mtk_gpio_r32(rg, GPIO_REG_STAT);
 
        for_each_set_bit(bit, &pending, MTK_BANK_WIDTH) {
-               u32 map = irq_find_mapping(gc->irq.domain, bit);
-
-               generic_handle_irq(map);
+               generic_handle_domain_irq(gc->irq.domain, bit);
                mtk_gpio_w32(rg, GPIO_REG_STAT, BIT(bit));
                ret |= IRQ_HANDLED;
        }
index b9fdf05d766947ece7d242516306f8ade3de23be..c871602fc5ba9bbdf309aa0f9c6bef98c1a2f08c 100644 (file)
@@ -241,7 +241,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
                if (port->both_edges & (1 << irqoffset))
                        mxc_flip_edge(port, irqoffset);
 
-               generic_handle_irq(irq_find_mapping(port->domain, irqoffset));
+               generic_handle_domain_irq(port->domain, irqoffset);
 
                irq_stat &= ~(1 << irqoffset);
        }
index 31a336b86ff2d6f80eb5a9537d1e64c06b326769..c5166cd47c9cd490af99dd7ae05e393313f68ab6 100644 (file)
@@ -157,7 +157,7 @@ static void mxs_gpio_irq_handler(struct irq_desc *desc)
                if (port->both_edges & (1 << irqoffset))
                        mxs_flip_edge(port, irqoffset);
 
-               generic_handle_irq(irq_find_mapping(port->domain, irqoffset));
+               generic_handle_domain_irq(port->domain, irqoffset);
                irq_stat &= ~(1 << irqoffset);
        }
 }
index ca23f72165ca4bcbcd4861d63c548a56a2b368ce..415e8df89d6fe019fc57be09a235be44398693a4 100644 (file)
@@ -611,8 +611,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)
 
                        raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags);
 
-                       generic_handle_irq(irq_find_mapping(bank->chip.irq.domain,
-                                                           bit));
+                       generic_handle_domain_irq(bank->chip.irq.domain, bit);
 
                        raw_spin_unlock_irqrestore(&bank->wa_lock,
                                                   wa_lock_flags);
index 9acec76e0b51a88979c88ff941f9e8af551d79b7..71a13a394050ffe65d1932e60e8d28ee9409af3c 100644 (file)
@@ -260,7 +260,7 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)
                return IRQ_NONE;
 
        for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)
-               generic_handle_irq(irq_find_mapping(chip->irq.domain, gpio));
+               generic_handle_domain_irq(chip->irq.domain, gpio);
 
        raw_spin_lock(&idio16gpio->lock);
 
index 2a07fd96707eed77b3820894d0775299fde37677..8a9b98fa418f62fe766f2f9dd496088a62998707 100644 (file)
@@ -468,8 +468,7 @@ static irqreturn_t idio_24_irq_handler(int irq, void *dev_id)
        irq_mask = idio24gpio->irq_mask & irq_status;
 
        for_each_set_bit(gpio, &irq_mask, chip->ngpio - 24)
-               generic_handle_irq(irq_find_mapping(chip->irq.domain,
-                       gpio + 24));
+               generic_handle_domain_irq(chip->irq.domain, gpio + 24);
 
        raw_spin_lock(&idio24gpio->lock);
 
index f1b53dd1df1ab4a00107ec4868b78c3dcbcccdff..4ecab700f23f6cc43c79a0bb05a0f1844e499faa 100644 (file)
@@ -223,8 +223,8 @@ static void pl061_irq_handler(struct irq_desc *desc)
        pending = readb(pl061->base + GPIOMIS);
        if (pending) {
                for_each_set_bit(offset, &pending, PL061_GPIO_NR)
-                       generic_handle_irq(irq_find_mapping(gc->irq.domain,
-                                                           offset));
+                       generic_handle_domain_irq(gc->irq.domain,
+                                                 offset);
        }
 
        chained_irq_exit(irqchip, desc);
index 0cb6600b8eeee88e4fc12c837d68c8c5d13a9c53..382468e294e1af1e99a3aaaae161a719fc0a1b79 100644 (file)
@@ -455,9 +455,8 @@ static irqreturn_t pxa_gpio_demux_handler(int in_irq, void *d)
                        for_each_set_bit(n, &gedr, BITS_PER_LONG) {
                                loop = 1;
 
-                               generic_handle_irq(
-                                       irq_find_mapping(pchip->irqdomain,
-                                                        gpio + n));
+                               generic_handle_domain_irq(pchip->irqdomain,
+                                                         gpio + n);
                        }
                }
                handled += loop;
@@ -471,9 +470,9 @@ static irqreturn_t pxa_gpio_direct_handler(int in_irq, void *d)
        struct pxa_gpio_chip *pchip = d;
 
        if (in_irq == pchip->irq0) {
-               generic_handle_irq(irq_find_mapping(pchip->irqdomain, 0));
+               generic_handle_domain_irq(pchip->irqdomain, 0);
        } else if (in_irq == pchip->irq1) {
-               generic_handle_irq(irq_find_mapping(pchip->irqdomain, 1));
+               generic_handle_domain_irq(pchip->irqdomain, 1);
        } else {
                pr_err("%s() unknown irq %d\n", __func__, in_irq);
                return IRQ_NONE;
index e7092d5fe700d2cec396e94d35e07999c91d1aa3..b378aba32602b15372bab0564b778e8d487a28da 100644 (file)
@@ -213,8 +213,8 @@ static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
                          gpio_rcar_read(p, INTMSK))) {
                offset = __ffs(pending);
                gpio_rcar_write(p, INTCLR, BIT(offset));
-               generic_handle_irq(irq_find_mapping(p->gpio_chip.irq.domain,
-                                                   offset));
+               generic_handle_domain_irq(p->gpio_chip.irq.domain,
+                                         offset);
                irqs_handled++;
        }
 
index 28dcbb58b76bf932ec921bbb4a929c2b0d969a91..463846431183caf89622c4d70774e435ce540564 100644 (file)
@@ -181,7 +181,7 @@ static void rda_gpio_irq_handler(struct irq_desc *desc)
        struct irq_chip *ic = irq_desc_get_chip(desc);
        struct rda_gpio *rda_gpio = gpiochip_get_data(chip);
        unsigned long status;
-       u32 n, girq;
+       u32 n;
 
        chained_irq_enter(ic, desc);
 
@@ -189,10 +189,8 @@ static void rda_gpio_irq_handler(struct irq_desc *desc)
        /* Only lower 8 bits are capable of generating interrupts */
        status &= RDA_GPIO_IRQ_MASK;
 
-       for_each_set_bit(n, &status, RDA_GPIO_BANK_NR) {
-               girq = irq_find_mapping(chip->irq.domain, n);
-               generic_handle_irq(girq);
-       }
+       for_each_set_bit(n, &status, RDA_GPIO_BANK_NR)
+               generic_handle_domain_irq(chip->irq.domain, n);
 
        chained_irq_exit(ic, desc);
 }
index cb64fb5a51aa1e9f52a7c96618e6996c3365e27f..eeeb39bc171dcba288a0aaa88b4a38a07c609915 100644 (file)
@@ -196,7 +196,6 @@ static void realtek_gpio_irq_handler(struct irq_desc *desc)
        struct irq_chip *irq_chip = irq_desc_get_chip(desc);
        unsigned int lines_done;
        unsigned int port_pin_count;
-       unsigned int irq;
        unsigned long status;
        int offset;
 
@@ -205,10 +204,8 @@ static void realtek_gpio_irq_handler(struct irq_desc *desc)
        for (lines_done = 0; lines_done < gc->ngpio; lines_done += 8) {
                status = realtek_gpio_read_isr(ctrl, lines_done / 8);
                port_pin_count = min(gc->ngpio - lines_done, 8U);
-               for_each_set_bit(offset, &status, port_pin_count) {
-                       irq = irq_find_mapping(gc->irq.domain, offset);
-                       generic_handle_irq(irq);
-               }
+               for_each_set_bit(offset, &status, port_pin_count)
+                       generic_handle_domain_irq(gc->irq.domain, offset);
        }
 
        chained_irq_exit(irq_chip, desc);
index a6f0421d6e505f7b1d7828fee10fccdbadb8df29..0600f71462b5655b1994d3ae8119b0891d497bb0 100644 (file)
@@ -259,7 +259,7 @@ static u32 sch_gpio_gpe_handler(acpi_handle gpe_device, u32 gpe, void *context)
 
        pending = (resume_status << sch->resume_base) | core_status;
        for_each_set_bit(offset, &pending, sch->chip.ngpio)
-               generic_handle_irq(irq_find_mapping(gc->irq.domain, offset));
+               generic_handle_domain_irq(gc->irq.domain, offset);
 
        /* Set returning value depending on whether we handled an interrupt */
        ret = pending ? ACPI_INTERRUPT_HANDLED : ACPI_INTERRUPT_NOT_HANDLED;
index aed988e78251e7567afd06f883903ce7fced3e02..c2a2c76c1652ddd5cc9b56eac2c5b1c529365a75 100644 (file)
@@ -84,7 +84,7 @@ static irqreturn_t sdv_gpio_pub_irq_handler(int irq, void *data)
                return IRQ_NONE;
 
        for_each_set_bit(irq_bit, &irq_stat, 32)
-               generic_handle_irq(irq_find_mapping(sd->id, irq_bit));
+               generic_handle_domain_irq(sd->id, irq_bit);
 
        return IRQ_HANDLED;
 }
index 25c37edcbc6c840c46662a75ccdffc5a9d96d143..9dd9dabb579e2dca36e1a307c9a308856895a360 100644 (file)
@@ -189,7 +189,7 @@ static void sprd_gpio_irq_handler(struct irq_desc *desc)
        struct gpio_chip *chip = irq_desc_get_handler_data(desc);
        struct irq_chip *ic = irq_desc_get_chip(desc);
        struct sprd_gpio *sprd_gpio = gpiochip_get_data(chip);
-       u32 bank, n, girq;
+       u32 bank, n;
 
        chained_irq_enter(ic, desc);
 
@@ -198,13 +198,9 @@ static void sprd_gpio_irq_handler(struct irq_desc *desc)
                unsigned long reg = readl_relaxed(base + SPRD_GPIO_MIS) &
                        SPRD_GPIO_BANK_MASK;
 
-               for_each_set_bit(n, &reg, SPRD_GPIO_BANK_NR) {
-                       girq = irq_find_mapping(chip->irq.domain,
-                                               bank * SPRD_GPIO_BANK_NR + n);
-
-                       generic_handle_irq(girq);
-               }
-
+               for_each_set_bit(n, &reg, SPRD_GPIO_BANK_NR)
+                       generic_handle_domain_irq(chip->irq.domain,
+                                                 bank * SPRD_GPIO_BANK_NR + n);
        }
        chained_irq_exit(ic, desc);
 }
index 866201cf5f65ed4899ebe37f00dd185b5580a760..718a508d3b2f87c0620f2a64b6fad9a4fd81731e 100644 (file)
@@ -100,7 +100,7 @@ static irqreturn_t tb10x_gpio_irq_cascade(int irq, void *data)
        int i;
 
        for_each_set_bit(i, &bits, 32)
-               generic_handle_irq(irq_find_mapping(tb10x_gpio->domain, i));
+               generic_handle_domain_irq(tb10x_gpio->domain, i);
 
        return IRQ_HANDLED;
 }
index 0025f613d9b31da12e9892a9099373b77bc5a813..7f5bc10a64792617c86058ec718624e4e8e1ca46 100644 (file)
@@ -408,6 +408,8 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc)
                lvl = tegra_gpio_readl(tgi, GPIO_INT_LVL(tgi, gpio));
 
                for_each_set_bit(pin, &sta, 8) {
+                       int ret;
+
                        tegra_gpio_writel(tgi, 1 << pin,
                                          GPIO_INT_CLR(tgi, gpio));
 
@@ -420,11 +422,8 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc)
                                chained_irq_exit(chip, desc);
                        }
 
-                       irq = irq_find_mapping(domain, gpio + pin);
-                       if (WARN_ON(irq == 0))
-                               continue;
-
-                       generic_handle_irq(irq);
+                       ret = generic_handle_domain_irq(domain, gpio + pin);
+                       WARN_RATELIMIT(ret, "hwirq = %d", gpio + pin);
                }
        }
 
index d38980b9923ac183ae1db99beeb2c23f207d43c7..05c90d76cb225cb75c620665114a666ddec35350 100644 (file)
@@ -456,7 +456,7 @@ static void tegra186_gpio_irq(struct irq_desc *desc)
 
        for (i = 0; i < gpio->soc->num_ports; i++) {
                const struct tegra_gpio_port *port = &gpio->soc->ports[i];
-               unsigned int pin, irq;
+               unsigned int pin;
                unsigned long value;
                void __iomem *base;
 
@@ -469,11 +469,8 @@ static void tegra186_gpio_irq(struct irq_desc *desc)
                value = readl(base + TEGRA186_GPIO_INTERRUPT_STATUS(1));
 
                for_each_set_bit(pin, &value, port->pins) {
-                       irq = irq_find_mapping(domain, offset + pin);
-                       if (WARN_ON(irq == 0))
-                               continue;
-
-                       generic_handle_irq(irq);
+                       int ret = generic_handle_domain_irq(domain, offset + pin);
+                       WARN_RATELIMIT(ret, "hwirq = %d", offset + pin);
                }
 
 skip:
index 5022e0ad0faee70b379d7cd3ab0bce2661fe51cf..e80ff42e94d0958b4390567ad33477e68bb25dea 100644 (file)
@@ -183,7 +183,7 @@ static void tqmx86_gpio_irq_handler(struct irq_desc *desc)
        struct tqmx86_gpio_data *gpio = gpiochip_get_data(chip);
        struct irq_chip *irq_chip = irq_desc_get_chip(desc);
        unsigned long irq_bits;
-       int i = 0, child_irq;
+       int i = 0;
        u8 irq_status;
 
        chained_irq_enter(irq_chip, desc);
@@ -192,11 +192,9 @@ static void tqmx86_gpio_irq_handler(struct irq_desc *desc)
        tqmx86_gpio_write(gpio, irq_status, TQMX86_GPIIS);
 
        irq_bits = irq_status;
-       for_each_set_bit(i, &irq_bits, TQMX86_NGPI) {
-               child_irq = irq_find_mapping(gpio->chip.irq.domain,
-                                            i + TQMX86_NGPO);
-               generic_handle_irq(child_irq);
-       }
+       for_each_set_bit(i, &irq_bits, TQMX86_NGPI)
+               generic_handle_domain_irq(gpio->chip.irq.domain,
+                                         i + TQMX86_NGPO);
 
        chained_irq_exit(irq_chip, desc);
 }
index 58776f2d69ff84e3c05c90d28a69c2a2248e115f..e0f2b67558e741eb5836a9e33bc7d63305a1fb56 100644 (file)
@@ -149,7 +149,7 @@ static void vf610_gpio_irq_handler(struct irq_desc *desc)
        for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
                vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
 
-               generic_handle_irq(irq_find_mapping(port->gc.irq.domain, pin));
+               generic_handle_domain_irq(port->gc.irq.domain, pin);
        }
 
        chained_irq_exit(chip, desc);
index 2d89d0529135a9c47db516a1ed317e09d4c9b1f8..bb02a82e22f417112456404082079eb61c864a21 100644 (file)
@@ -339,8 +339,8 @@ static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id)
                for_each_set_bit(port, &int_pending, 3) {
                        int_id = inb(ws16c48gpio->base + 8 + port);
                        for_each_set_bit(gpio, &int_id, 8)
-                               generic_handle_irq(irq_find_mapping(
-                                       chip->irq.domain, gpio + 8*port));
+                               generic_handle_domain_irq(chip->irq.domain,
+                                                         gpio + 8*port);
                }
 
                int_pending = inb(ws16c48gpio->base + 6) & 0x7;
index ad5489a65d542a04311a4739552b11c1d50c9b53..fa9b4d8c3ff53158f46a1b03b23a2fc61ade9ac5 100644 (file)
@@ -185,7 +185,7 @@ static irqreturn_t iproc_gpio_irq_handler(int irq, void *data)
                int_bits = level | event;
 
                for_each_set_bit(bit, &int_bits, gc->ngpio)
-                       generic_handle_irq(irq_linear_revmap(gc->irq.domain, bit));
+                       generic_handle_domain_irq(gc->irq.domain, bit);
        }
 
        return int_bits ? IRQ_HANDLED : IRQ_NONE;
index c329c3a606e846ebf13977a1143c346034bf2f54..a1b66338d077dae678ba27f6d6e6fd88e3d59116 100644 (file)
@@ -538,7 +538,7 @@ static void xgpio_irqhandler(struct irq_desc *desc)
 
        for_each_set_bit(bit, all, 64) {
                irq_offset = xgpio_from_bit(chip, bit);
-               generic_handle_irq(irq_find_mapping(gc->irq.domain, irq_offset));
+               generic_handle_domain_irq(gc->irq.domain, irq_offset);
        }
 
        chained_irq_exit(irqchip, desc);
index d7b16bb9e4e4c515051e5b725416c395873eca37..0d94d3aef7521aa71afdddfb09a3cc40b8185393 100644 (file)
@@ -216,8 +216,7 @@ static void xlp_gpio_generic_handler(struct irq_desc *desc)
                }
 
                if (gpio_stat & BIT(gpio % XLP_GPIO_REGSZ))
-                       generic_handle_irq(irq_find_mapping(
-                                               priv->chip.irq.domain, gpio));
+                       generic_handle_domain_irq(priv->chip.irq.domain, gpio);
        }
        chained_irq_exit(irqchip, desc);
 }
index f0cb8ccd03ed07f204835e2a6c619e9fcf662aa5..06c6401f02b89e0113f58ece5ef77e5307eb6ccf 100644 (file)
@@ -628,12 +628,8 @@ static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,
        if (!pending)
                return;
 
-       for_each_set_bit(offset, &pending, 32) {
-               unsigned int gpio_irq;
-
-               gpio_irq = irq_find_mapping(irqdomain, offset + bank_offset);
-               generic_handle_irq(gpio_irq);
-       }
+       for_each_set_bit(offset, &pending, 32)
+               generic_handle_domain_irq(irqdomain, offset + bank_offset);
 }
 
 /**