wifi: rtw89: mac: refine SER setting during WiFi CPU power on

Don't enable firmware debug mode to prevent SER flow stuck due to fail
to reset payload buffer, and clear HALT_C2H_INT to avoid handling
unexpected interrupt at beginning.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231204080751.15354-6-pkshih@realtek.com

diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c
index c3c920ccb2f9b25dffa8de025b8ab0c1ff6007e5..7ad509787d7270b53d28b79bf995c271b3940976 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/mac_be.c
+++ b/drivers/net/wireless/realtek/rtw89/mac_be.c
@@ -384,8 +384,6 @@ static int wcpu_on(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw)
        u32 val32;
        int ret;
 
-       rtw89_write32_set(rtwdev, R_BE_UDM0, B_BE_UDM0_DBG_MODE_CTRL);
-
        val32 = rtw89_read32(rtwdev, R_BE_HALT_C2H);
        if (val32) {
                rtw89_warn(rtwdev, "[SER] AON L2 Debug register not empty before Boot.\n");
@@ -409,6 +407,10 @@ static int wcpu_on(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw)
        rtw89_write32(rtwdev, R_BE_HALT_H2C_CTRL, 0);
        rtw89_write32(rtwdev, R_BE_HALT_C2H_CTRL, 0);
 
+       val32 = rtw89_read32(rtwdev, R_BE_HISR0);
+       rtw89_write32(rtwdev, R_BE_HISR0, B_BE_HALT_C2H_INT);
+       rtw89_debug(rtwdev, RTW89_DBG_SER, "HISR0=0x%x\n", val32);
+
        rtw89_write32_set(rtwdev, R_BE_SYS_CLK_CTRL, B_BE_CPU_CLK_EN);
        rtw89_write32_clr(rtwdev, R_BE_SYS_CFG5,
                          B_BE_WDT_WAKE_PCIE_EN | B_BE_WDT_WAKE_USB_EN);