ARM: dts: DRA7: change address-cells and size-cells
authorLokesh Vutla <lokeshvutla@ti.com>
Wed, 24 Feb 2016 10:11:04 +0000 (15:41 +0530)
committerTony Lindgren <tony@atomide.com>
Mon, 29 Feb 2016 23:02:15 +0000 (15:02 -0800)
DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should be 2. So, changing the address-cells and size-cells to 2 and
updating the memory nodes accordingly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am57xx-beagle-x15.dts
arch/arm/boot/dts/am57xx-cl-som-am57x.dts
arch/arm/boot/dts/dra7-evm.dts
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/dra72-evm.dts

index 50312f80b9723c2191cae093b525e4acd6ed255f..9b664c58e395df2974791c442fa70c76de206c2d 100644 (file)
@@ -24,7 +24,7 @@
 
        memory {
                device_type = "memory";
-               reg = <0x80000000 0x80000000>;
+               reg = <0x0 0x80000000 0x0 0x80000000>;
        };
 
        vdd_3v3: fixedregulator-vdd_3v3 {
index c53882643ae96b6da8b15c6a26e5fd93ba3300cb..e6c40db3023b1b62e54b153407eb194bd2ecf5dd 100644 (file)
@@ -21,7 +21,7 @@
 
        memory {
                device_type = "memory";
-               reg = <0x80000000 0x20000000>; /* 512 MB - minimal configuration */
+               reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */
        };
 
        leds {
index 803ab0e0365767a43da7c758b5ec17bd59945896..d9b87236019d8d9aec502cd9235cf7f0863a8b96 100644 (file)
@@ -18,7 +18,7 @@
 
        memory {
                device_type = "memory";
-               reg = <0x80000000 0x60000000>; /* 1536 MB */
+               reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */
        };
 
        evm_3v3_sd: fixedregulator-sd {
index 54f9cd805ff153bb480956832bcad2e76b8d2229..098b4dd14b01ffa61c5e147ee3c54d393a003c6d 100644 (file)
@@ -15,8 +15,8 @@
 #define MAX_SOURCES 400
 
 / {
-       #address-cells = <1>;
-       #size-cells = <1>;
+       #address-cells = <2>;
+       #size-cells = <2>;
 
        compatible = "ti,dra7xx";
        interrupt-parent = <&crossbar_mpu>;
                compatible = "arm,cortex-a15-gic";
                interrupt-controller;
                #interrupt-cells = <3>;
-               reg = <0x48211000 0x1000>,
-                     <0x48212000 0x1000>,
-                     <0x48214000 0x2000>,
-                     <0x48216000 0x2000>;
+               reg = <0x0 0x48211000 0x0 0x1000>,
+                     <0x0 0x48212000 0x0 0x1000>,
+                     <0x0 0x48214000 0x0 0x2000>,
+                     <0x0 0x48216000 0x0 0x2000>;
                interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
                interrupt-parent = <&gic>;
        };
@@ -69,7 +69,7 @@
                compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
                interrupt-controller;
                #interrupt-cells = <3>;
-               reg = <0x48281000 0x1000>;
+               reg = <0x0 0x48281000 0x0 0x1000>;
                interrupt-parent = <&gic>;
        };
 
                compatible = "ti,dra7-l3-noc", "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
-               ranges;
+               ranges = <0x0 0x0 0x0 0xc0000000>;
                ti,hwmods = "l3_main_1", "l3_main_2";
-               reg = <0x44000000 0x1000000>,
-                     <0x45000000 0x1000>;
+               reg = <0x0 0x44000000 0x0 0x1000000>,
+                     <0x0 0x45000000 0x0 0x1000>;
                interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
                                      <&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 
index 8916433efd2f240278db0413566ec34683c966f6..6affe2d137da882d4434b223bf0eed07d8696b45 100644 (file)
@@ -17,7 +17,7 @@
 
        memory {
                device_type = "memory";
-               reg = <0x80000000 0x40000000>; /* 1024 MB */
+               reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */
        };
 
        aliases {