ARM: dts: sun8i: a23/a33: Remove redundant MMC pinmux tuning

Some boards override the MMC pin muxing settings in order to enable the
pull-ups and change the drive strength to a value higher than the default.

While this was needed in the earlier days, this is now the default setting
for those pins, and therefore we don't need those board-specific settings
anymore.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
index 649e31339662832c4fa64bbfe18cd07bc1aef61b..61a4702b63c1f6bea6eeb5aa5e79eed6e3f3ea76 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts
@@ -85,10 +85,6 @@
        };
 };
 
-&mmc1_pins_a {
-       bias-pull-up;
-};
-
 &r_pio {
        wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 {
                pins = "PL6";

diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
index 6b3bcae089f2e5905bc8f328b45e04125dcf92c5..29a032164e3dfbe0ba866248f3bbd07003791340 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
+++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts
@@ -78,10 +78,6 @@
        };
 };
 
-&mmc1_pins_a {
-       bias-pull-up;
-};
-
 &r_pio {
        wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 {
                pins = "PL6";

diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
index 3e05959104f175768ec6d2ecb04b4ff973eddf5b..f8a72d07467c265d8becbda57fb61d1eb1019fef 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
+++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts
@@ -70,10 +70,6 @@
        };
 };
 
-&mmc1_pins_a {
-       bias-pull-up;
-};
-
 &mmc1 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc1_pins_a>;

diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index 541acb4d2b91069da9f16a8ad8a75be91df8f162..ff7244cdfa88f49961b80ff7c5fb3d62b721160d 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -161,8 +161,6 @@
 &mmc2_8bit_pins {
        /* Increase drive strength for DDR modes */
        drive-strength = <40>;
-       /* eMMC is missing pull-ups */
-       bias-pull-up;
 };
 
 &ohci0 {

diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi
index c676940a96dadd695aa20fdadfc15f9f0409ae23..0b3db925254b333c2ef080ff0a1a870d13bbb680 100644 (file)
--- a/arch/arm/boot/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi
@@ -82,10 +82,6 @@
        };
 };
 
-&mmc1_pins_a {
-       bias-pull-up;
-};
-
 &r_pio {
        wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 {
                pins = "PL6", "PL7", "PL11";

diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts
index 472c03b7aeabec8f8966c342f72f67bb4123bbfd..7322357aab04363a8357da9ded8ec1ac77a36ca3 100644 (file)
--- a/arch/arm/boot/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts
@@ -158,7 +158,6 @@
 
 &mmc2_8bit_pins {
        drive-strength = <40>;
-       bias-pull-up;
 };
 
 &ohci0 {