drm/xe/xe2hpg: Add Wa_15016589081
authorTejas Upadhyay <tejas.upadhyay@intel.com>
Wed, 4 Sep 2024 10:13:33 +0000 (15:43 +0530)
committerLucas De Marchi <lucas.demarchi@intel.com>
Thu, 12 Sep 2024 23:04:36 +0000 (18:04 -0500)
Wa_15016589081 applies to xe2_hpg renderCS

V2(Gustavo)
  - rename bit macro

Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240904101333.2049655-1-tejas.upadhyay@intel.com
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
(cherry picked from commit 9db969b36b2fbca13ad4088aff725ebd5e8142f5)
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
drivers/gpu/drm/xe/regs/xe_gt_regs.h
drivers/gpu/drm/xe/xe_wa.c

index 0d1a4a9f4e1194c0aea81e1528c305ed98881bfc..660ff42e45a6f44097419d3c769d5f156583fb8b 100644 (file)
 
 #define CHICKEN_RASTER_1                       XE_REG_MCR(0x6204, XE_REG_OPTION_MASKED)
 #define   DIS_SF_ROUND_NEAREST_EVEN            REG_BIT(8)
+#define   DIS_CLIP_NEGATIVE_BOUNDING_BOX       REG_BIT(6)
 
 #define CHICKEN_RASTER_2                       XE_REG_MCR(0x6208, XE_REG_OPTION_MASKED)
 #define   TBIMR_FAST_CLIP                      REG_BIT(5)
index 28b7f95b6c2f8d4c30d59c76bfdffed3c3e97da5..d424992514a4dcabd1960128dbc1847146a1ce6a 100644 (file)
@@ -733,6 +733,10 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
                             DIS_PARTIAL_AUTOSTRIP |
                             DIS_AUTOSTRIP))
        },
+       { XE_RTP_NAME("15016589081"),
+         XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
+         XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))
+       },
 
        {}
 };