arm64: dts: qcom: sm8150: switch USB QMP PHY to new style of bindings
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 24 Aug 2023 21:19:48 +0000 (00:19 +0300)
committerBjorn Andersson <andersson@kernel.org>
Tue, 14 Nov 2023 17:04:38 +0000 (11:04 -0600)
Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-13-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm8150.dtsi

index 97623af13464c26d5ef30d62257819e014afdec4..7eee72415ebb7a34784bf1445e3e4d5c5f048110 100644 (file)
 
                usb_2_qmpphy: phy@88eb000 {
                        compatible = "qcom,sm8150-qmp-usb3-uni-phy";
-                       reg = <0 0x088eb000 0 0x200>;
-                       status = "disabled";
-                       #address-cells = <2>;
-                       #size-cells = <2>;
-                       ranges;
+                       reg = <0 0x088eb000 0 0x1000>;
 
                        clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
-                                <&rpmhcc RPMH_CXO_CLK>,
                                 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
-                                <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
-                       clock-names = "aux", "ref_clk_src", "ref", "com_aux";
+                                <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
+                                <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
+                       clock-names = "aux",
+                                     "ref",
+                                     "com_aux",
+                                     "pipe";
+                       clock-output-names = "usb3_uni_phy_pipe_clk_src";
+                       #clock-cells = <0>;
+                       #phy-cells = <0>;
 
-                       resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
-                                <&gcc GCC_USB3_PHY_SEC_BCR>;
-                       reset-names = "phy", "common";
+                       resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
+                                <&gcc GCC_USB3PHY_PHY_SEC_BCR>;
+                       reset-names = "phy",
+                                     "phy_phy";
 
-                       usb_2_ssphy: phy@88eb200 {
-                               reg = <0 0x088eb200 0 0x200>,
-                                     <0 0x088eb400 0 0x200>,
-                                     <0 0x088eb800 0 0x800>,
-                                     <0 0x088eb600 0 0x200>;
-                               #clock-cells = <0>;
-                               #phy-cells = <0>;
-                               clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
-                               clock-names = "pipe0";
-                               clock-output-names = "usb3_uni_phy_pipe_clk_src";
-                       };
+                       status = "disabled";
                };
 
                sdhc_2: mmc@8804000 {
                                iommus = <&apps_smmu 0x160 0>;
                                snps,dis_u2_susphy_quirk;
                                snps,dis_enblslpm_quirk;
-                               phys = <&usb_2_hsphy>, <&usb_2_ssphy>;
+                               phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
                                phy-names = "usb2-phy", "usb3-phy";
                        };
                };