Merge branch 'drm-fixes-3.18' of git://people.freedesktop.org/~agd5f/linux into drm...
authorDave Airlie <airlied@redhat.com>
Mon, 20 Oct 2014 01:57:21 +0000 (11:57 +1000)
committerDave Airlie <airlied@redhat.com>
Mon, 20 Oct 2014 01:57:21 +0000 (11:57 +1000)
First round of fixes for 3.18.
- Use gart for DMA ring tests to avoid caching issues with HDP
- SI dpm stability fixes
- Performance stabilization fixes
- misc other things

* 'drm-fixes-3.18' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: reduce sparse false positive warnings
  drm/radeon: fix vm page table block size calculation
  drm/ttm: Don't evict BOs outside of the requested placement range
  drm/ttm: Don't skip fpfn check if lpfn is 0 in ttm_bo_mem_compat
  drm/radeon: use gart memory for DMA ring tests
  drm/radeon: fix speaker allocation setup
  drm/radeon: initialize sadb to NULL in the audio code
  Revert "drm/radeon/dpm: drop clk/voltage dependency filters for SI"
  Revert "drm/radeon: drop btc_get_max_clock_from_voltage_dependency_table"

1  2 
drivers/gpu/drm/radeon/cik_sdma.c
drivers/gpu/drm/radeon/r600_dma.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_device.c

index c77dad1a45769b151526377fac7e601129ee9221,7deb2ef4da3215abbd71d84143e32266c626cd4b..4e8432d07f15a84893cc6cff666992135abdb7ae
@@@ -489,6 -489,13 +489,6 @@@ int cik_sdma_resume(struct radeon_devic
  {
        int r;
  
 -      /* Reset dma */
 -      WREG32(SRBM_SOFT_RESET, SOFT_RESET_SDMA | SOFT_RESET_SDMA1);
 -      RREG32(SRBM_SOFT_RESET);
 -      udelay(50);
 -      WREG32(SRBM_SOFT_RESET, 0);
 -      RREG32(SRBM_SOFT_RESET);
 -
        r = cik_sdma_load_microcode(rdev);
        if (r)
                return r;
@@@ -611,16 -618,19 +611,19 @@@ int cik_sdma_ring_test(struct radeon_de
  {
        unsigned i;
        int r;
-       void __iomem *ptr = (void *)rdev->vram_scratch.ptr;
+       unsigned index;
        u32 tmp;
+       u64 gpu_addr;
  
-       if (!ptr) {
-               DRM_ERROR("invalid vram scratch pointer\n");
-               return -EINVAL;
-       }
+       if (ring->idx == R600_RING_TYPE_DMA_INDEX)
+               index = R600_WB_DMA_RING_TEST_OFFSET;
+       else
+               index = CAYMAN_WB_DMA1_RING_TEST_OFFSET;
+       gpu_addr = rdev->wb.gpu_addr + index;
  
        tmp = 0xCAFEDEAD;
-       writel(tmp, ptr);
+       rdev->wb.wb[index/4] = cpu_to_le32(tmp);
  
        r = radeon_ring_lock(rdev, ring, 5);
        if (r) {
                return r;
        }
        radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0));
-       radeon_ring_write(ring, rdev->vram_scratch.gpu_addr & 0xfffffffc);
-       radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr));
+       radeon_ring_write(ring, lower_32_bits(gpu_addr));
+       radeon_ring_write(ring, upper_32_bits(gpu_addr));
        radeon_ring_write(ring, 1); /* number of DWs to follow */
        radeon_ring_write(ring, 0xDEADBEEF);
        radeon_ring_unlock_commit(rdev, ring, false);
  
        for (i = 0; i < rdev->usec_timeout; i++) {
-               tmp = readl(ptr);
+               tmp = le32_to_cpu(rdev->wb.wb[index/4]);
                if (tmp == 0xDEADBEEF)
                        break;
                DRM_UDELAY(1);
index 100189ec5fa85133b840851d4def58bbbae6ffc0,d9375a3619858570d6679555a16db3d43f5f0690..aabc343b9a8faa10728b5dd73444048a243b82e7
@@@ -124,6 -124,15 +124,6 @@@ int r600_dma_resume(struct radeon_devic
        u32 rb_bufsz;
        int r;
  
 -      /* Reset dma */
 -      if (rdev->family >= CHIP_RV770)
 -              WREG32(SRBM_SOFT_RESET, RV770_SOFT_RESET_DMA);
 -      else
 -              WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA);
 -      RREG32(SRBM_SOFT_RESET);
 -      udelay(50);
 -      WREG32(SRBM_SOFT_RESET, 0);
 -
        WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0);
        WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0);
  
@@@ -232,16 -241,19 +232,19 @@@ int r600_dma_ring_test(struct radeon_de
  {
        unsigned i;
        int r;
-       void __iomem *ptr = (void *)rdev->vram_scratch.ptr;
+       unsigned index;
        u32 tmp;
+       u64 gpu_addr;
  
-       if (!ptr) {
-               DRM_ERROR("invalid vram scratch pointer\n");
-               return -EINVAL;
-       }
+       if (ring->idx == R600_RING_TYPE_DMA_INDEX)
+               index = R600_WB_DMA_RING_TEST_OFFSET;
+       else
+               index = CAYMAN_WB_DMA1_RING_TEST_OFFSET;
+       gpu_addr = rdev->wb.gpu_addr + index;
  
        tmp = 0xCAFEDEAD;
-       writel(tmp, ptr);
+       rdev->wb.wb[index/4] = cpu_to_le32(tmp);
  
        r = radeon_ring_lock(rdev, ring, 4);
        if (r) {
                return r;
        }
        radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1));
-       radeon_ring_write(ring, rdev->vram_scratch.gpu_addr & 0xfffffffc);
-       radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xff);
+       radeon_ring_write(ring, lower_32_bits(gpu_addr));
+       radeon_ring_write(ring, upper_32_bits(gpu_addr) & 0xff);
        radeon_ring_write(ring, 0xDEADBEEF);
        radeon_ring_unlock_commit(rdev, ring, false);
  
        for (i = 0; i < rdev->usec_timeout; i++) {
-               tmp = readl(ptr);
+               tmp = le32_to_cpu(rdev->wb.wb[index/4]);
                if (tmp == 0xDEADBEEF)
                        break;
                DRM_UDELAY(1);
index f7c4b226a284a162fcd088210d85b7b3ff57a838,588672d4fd5993e45420638ba463020b1d7f72b5..a9717b3fbf1b4bd77417c38c29ac2c577179e947
@@@ -110,7 -110,6 +110,7 @@@ extern int radeon_vm_block_size
  extern int radeon_deep_color;
  extern int radeon_use_pflipirq;
  extern int radeon_bapm;
 +extern int radeon_backlight;
  
  /*
   * Copy from radeon_drv.h so we don't have to include both and have conflicting
@@@ -1133,6 -1132,8 +1133,8 @@@ struct radeon_wb 
  #define R600_WB_EVENT_OFFSET     3072
  #define CIK_WB_CP1_WPTR_OFFSET     3328
  #define CIK_WB_CP2_WPTR_OFFSET     3584
+ #define R600_WB_DMA_RING_TEST_OFFSET 3588
+ #define CAYMAN_WB_DMA1_RING_TEST_OFFSET 3592
  
  /**
   * struct radeon_pm - power management datas
index f41cc1538e4851fcafcec22e29ffcfb07d7b0c98,55065d8442056d5ff5d1a0f5400878035e5d3158..ea2676954dde7ce6e157aa1d628782c0906bc7c2
@@@ -123,10 -123,6 +123,10 @@@ static struct radeon_px_quirk radeon_px
         * https://bugzilla.kernel.org/show_bug.cgi?id=51381
         */
        { PCI_VENDOR_ID_ATI, 0x6741, 0x1043, 0x108c, RADEON_PX_QUIRK_DISABLE_PX },
 +      /* Asus K53TK laptop with AMD A6-3420M APU and Radeon 7670m GPU
 +       * https://bugzilla.kernel.org/show_bug.cgi?id=51381
 +       */
 +      { PCI_VENDOR_ID_ATI, 0x6840, 0x1043, 0x2122, RADEON_PX_QUIRK_DISABLE_PX },
        /* macbook pro 8.2 */
        { PCI_VENDOR_ID_ATI, 0x6741, PCI_VENDOR_ID_APPLE, 0x00e2, RADEON_PX_QUIRK_LONG_WAKEUP },
        { 0, 0, 0, 0, 0 },
@@@ -1130,7 -1126,7 +1130,7 @@@ static void radeon_check_arguments(stru
        if (radeon_vm_block_size == -1) {
  
                /* Total bits covered by PD + PTs */
-               unsigned bits = ilog2(radeon_vm_size) + 17;
+               unsigned bits = ilog2(radeon_vm_size) + 18;
  
                /* Make sure the PD is 4K in size up to 8GB address space.
                   Above that split equal between PD and PTs */
@@@ -1400,7 -1396,7 +1400,7 @@@ int radeon_device_init(struct radeon_de
  
        r = radeon_init(rdev);
        if (r)
 -              return r;
 +              goto failed;
  
        r = radeon_gem_debugfs_init(rdev);
        if (r) {
                radeon_agp_disable(rdev);
                r = radeon_init(rdev);
                if (r)
 -                      return r;
 +                      goto failed;
        }
  
        r = radeon_ib_ring_tests(rdev);
                        DRM_INFO("radeon: acceleration disabled, skipping benchmarks\n");
        }
        return 0;
 +
 +failed:
 +      if (runtime)
 +              vga_switcheroo_fini_domain_pm_ops(rdev->dev);
 +      return r;
  }
  
  static void radeon_debugfs_remove_files(struct radeon_device *rdev);
@@@ -1467,8 -1458,6 +1467,8 @@@ void radeon_device_fini(struct radeon_d
        radeon_bo_evict_vram(rdev);
        radeon_fini(rdev);
        vga_switcheroo_unregister_client(rdev->pdev);
 +      if (rdev->flags & RADEON_IS_PX)
 +              vga_switcheroo_fini_domain_pm_ops(rdev->dev);
        vga_client_register(rdev->pdev, NULL, NULL, NULL);
        if (rdev->rio_mem)
                pci_iounmap(rdev->pdev, rdev->rio_mem);