powerpc/64e: Define mmu_pte_psize static
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Tue, 20 Aug 2024 12:42:38 +0000 (14:42 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 22 Aug 2024 12:52:29 +0000 (22:52 +1000)
mmu_pte_psize is only used in the tlb_64e.c, define it static.

Fixes: 25d21ad6e799 ("powerpc: Add TLB management code for 64-bit Book3E")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202408011256.1O99IB0s-lkp@intel.com/
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/beb30d280eaa5d857c38a0834b147dffd6b28aa9.1724157750.git.christophe.leroy@csgroup.eu
arch/powerpc/mm/nohash/tlb_64e.c

index 113edf76d3ce4494a94e53c0fca672a00a6a86b4..d26656b07b72cda75ec73358e919caa9898a3f7e 100644 (file)
@@ -33,7 +33,7 @@
  * though this will probably be made common with other nohash
  * implementations at some point
  */
-int mmu_pte_psize;             /* Page size used for PTE pages */
+static int mmu_pte_psize;      /* Page size used for PTE pages */
 int mmu_vmemmap_psize;         /* Page size used for the virtual mem map */
 int book3e_htw_mode;           /* HW tablewalk?  Value is PPC_HTW_* */
 unsigned long linear_map_top;  /* Top of linear mapping */