ARM: dts: qcom: apq8064: link LVDS clocks
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 25 Apr 2025 09:51:57 +0000 (12:51 +0300)
committerBjorn Andersson <andersson@kernel.org>
Wed, 14 May 2025 20:32:43 +0000 (21:32 +0100)
Link LVDS clocks to the from MDP4 to the MMCC and back from the MMCC
to the MDP4 display controller.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250425-fd-mdp4-lvds-v4-7-6b212160b44c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm/boot/dts/qcom/qcom-apq8064.dtsi

index b02e6739ccb20a287095d8c3e212040e4ac50fdd..17e506ca2438b33675477b65584c2b15bc1ae11d 100644 (file)
                                 <&dsi0_phy 0>,
                                 <&dsi1_phy 1>,
                                 <&dsi1_phy 0>,
-                                <&hdmi_phy>;
+                                <&hdmi_phy>,
+                                <&mdp>;
                        clock-names = "pxo",
                                      "pll3",
                                      "pll8_vote",
                                      "dsi1pllbyte",
                                      "dsi2pll",
                                      "dsi2pllbyte",
-                                     "hdmipll";
+                                     "hdmipll",
+                                     "lvdspll";
                };
 
                l2cc: clock-controller@2011000 {
                                 <&mmcc MDP_AXI_CLK>,
                                 <&mmcc MDP_LUT_CLK>,
                                 <&mmcc HDMI_TV_CLK>,
-                                <&mmcc MDP_TV_CLK>;
+                                <&mmcc MDP_TV_CLK>,
+                                <&mmcc LVDS_CLK>,
+                                <&rpmcc RPM_PXO_CLK>;
                        clock-names = "core_clk",
                                      "iface_clk",
                                      "bus_clk",
                                      "lut_clk",
                                      "hdmi_clk",
-                                     "tv_clk";
+                                     "tv_clk",
+                                     "lcdc_clk",
+                                     "pxo";
+
+                       #clock-cells = <0>;
 
                        iommus = <&mdp_port0 0
                                  &mdp_port0 2