PM / devfreq: rockchip-dfi: Handle LPDDR4X
authorSascha Hauer <s.hauer@pengutronix.de>
Wed, 18 Oct 2023 06:17:00 +0000 (08:17 +0200)
committerChanwoo Choi <cw00.choi@samsung.com>
Thu, 19 Oct 2023 11:48:28 +0000 (20:48 +0900)
In the DFI driver LPDDR4X can be handled in the same way as LPDDR4. Add
the missing case.

Link: https://lore.kernel.org/all/20231018061714.3553817-13-s.hauer@pengutronix.de/
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
drivers/devfreq/event/rockchip-dfi.c
include/soc/rockchip/rockchip_grf.h

index 8ce0191552ef1e183c30e126f9a10bebe30b9602..bdf421b248df90c0603b9b443cac2720e7d34c46 100644 (file)
@@ -90,6 +90,7 @@ static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
                               dfi_regs + DDRMON_CTRL);
                break;
        case ROCKCHIP_DDRTYPE_LPDDR4:
+       case ROCKCHIP_DDRTYPE_LPDDR4X:
                writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK),
                               dfi_regs + DDRMON_CTRL);
                break;
index dde1a9796ccb5800be9f7222dff94fd15bf35c2d..e46fd72aea8d1f649768a3269b85176dacceef0e 100644 (file)
@@ -12,6 +12,7 @@ enum {
        ROCKCHIP_DDRTYPE_LPDDR2 = 5,
        ROCKCHIP_DDRTYPE_LPDDR3 = 6,
        ROCKCHIP_DDRTYPE_LPDDR4 = 7,
+       ROCKCHIP_DDRTYPE_LPDDR4X = 8,
 };
 
 #endif /* __SOC_ROCKCHIP_GRF_H */