drm/amdgpu: define ring structure to access rptr/wptr/fence
authorJack Xiao <Jack.Xiao@amd.com>
Thu, 11 Jun 2020 03:27:47 +0000 (11:27 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 4 May 2022 14:03:23 +0000 (10:03 -0400)
Define ring structure to access the cpu/gpu address of rptr/wptr/fence
instead of dynamic calculation.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

index 317a66bcd258dce01ee19271a0cebdc1d264361c..7d89a52091c0e692b3619a52f61bbaeac2ff8379 100644 (file)
@@ -230,6 +230,8 @@ struct amdgpu_ring {
        struct amdgpu_bo        *ring_obj;
        volatile uint32_t       *ring;
        unsigned                rptr_offs;
+       u64                     rptr_gpu_addr;
+       volatile u32            *rptr_cpu_addr;
        u64                     wptr;
        u64                     wptr_old;
        unsigned                ring_size;
@@ -250,7 +252,11 @@ struct amdgpu_ring {
        bool                    use_doorbell;
        bool                    use_pollmem;
        unsigned                wptr_offs;
+       u64                     wptr_gpu_addr;
+       volatile u32            *wptr_cpu_addr;
        unsigned                fence_offs;
+       u64                     fence_gpu_addr;
+       volatile u32            *fence_cpu_addr;
        uint64_t                current_ctx;
        char                    name[16];
        u32                     trail_seq;