pinctrl: nuvoton: npcm8xx: add pin 250 to DDR pins group

Add pin 250 to DDR pins group on the Nuvoton NPCM8xx BMC SoC.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/20240716194008.3502068-6-tmaimon77@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
index 4e02d1a68f39503f29897298013574a9661d2687..bc947d0d6ede8f9086c99d391ba1120999e63cba 100644 (file)
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
@@ -515,7 +515,7 @@ static const int rg2_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212,
 static const int rg2mdio_pins[] = { 216, 217 };
 
 static const int ddr_pins[] = { 110, 111, 112, 113, 208, 209, 210, 211, 212,
-       213, 214, 215, 216, 217 };
+       213, 214, 215, 216, 217, 250 };
 
 static const int iox1_pins[] = { 0, 1, 2, 3 };
 static const int iox2_pins[] = { 4, 5, 6, 7 };
@@ -1562,6 +1562,7 @@ static const struct npcm8xx_pincfg pincfg[] = {
        NPCM8XX_PINCFG(245,     i3c2, MFSEL5, 21,       none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          SLEW),
        NPCM8XX_PINCFG(246,     i3c3, MFSEL5, 23,       none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          SLEW),
        NPCM8XX_PINCFG(247,     i3c3, MFSEL5, 23,       none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          SLEW),
+       NPCM8XX_PINCFG(250,     ddr, MFSEL3, 26,        none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          DSTR(8, 12) | SLEW),
        NPCM8XX_PINCFG(251,     jm2, MFSEL5, 1,         none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          SLEW),
        NPCM8XX_PINCFG(253,     none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          GPI), /* SDHC1 power */
        NPCM8XX_PINCFG(254,     none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          none, NONE, 0,          GPI), /* SDHC2 power */