ASoC: Intel: Skylake: Disable clock gating during firmware and library download
authorPardha Saradhi K <pardha.saradhi.kesapragada@intel.com>
Tue, 2 Jan 2018 09:29:57 +0000 (14:59 +0530)
committerMark Brown <broonie@kernel.org>
Wed, 3 Jan 2018 11:39:07 +0000 (11:39 +0000)
During firmware and library download, sometimes it is observed that
firmware and library download is timed-out resulting into probe failure.

This patch disables dynamic clock gating while firmware and library
download.

Signed-off-by: Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com>
Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com>
Signed-off-by: Guneshwor Singh <guneshwor.o.singh@intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/skylake/skl-messages.c
sound/soc/intel/skylake/skl-pcm.c

index 4e63213a8d55cd43c6b946e81af3d8e8b6babf12..933c1fbb222ff96eac9ba03427cb2c1cbb764732 100644 (file)
@@ -417,7 +417,11 @@ int skl_resume_dsp(struct skl *skl)
        if (skl->skl_sst->is_first_boot == true)
                return 0;
 
+       /* disable dynamic clock gating during fw and lib download */
+       ctx->enable_miscbdcge(ctx->dev, false);
+
        ret = skl_dsp_wake(ctx->dsp);
+       ctx->enable_miscbdcge(ctx->dev, true);
        if (ret < 0)
                return ret;
 
index cc6535ab84d1fbe7c84dbddaf02cd215964fa118..b45a9cd5f058818ac5a54495606613438d66d870 100644 (file)
@@ -1342,7 +1342,11 @@ static int skl_platform_soc_probe(struct snd_soc_platform *platform)
                        return -EIO;
                }
 
+               /* disable dynamic clock gating during fw and lib download */
+               skl->skl_sst->enable_miscbdcge(platform->dev, false);
+
                ret = ops->init_fw(platform->dev, skl->skl_sst);
+               skl->skl_sst->enable_miscbdcge(platform->dev, true);
                if (ret < 0) {
                        dev_err(platform->dev, "Failed to boot first fw: %d\n", ret);
                        return ret;