drm/amd/display: enable DPG when disabling plane for phantom pipe

[Why]
In disable_dangling_plane, for phantom pipes, we enable OTG so
disable programming gets the double buffer update.  But this
causes an underflow to occur.

[How]
Enable DPG prior to enabling OTG.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 1c218c5266509f8e167fa49aff1c9907f7c6d250..510661d303e8a3dfc29f71c77a91e623516441c2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -74,6 +74,8 @@
 
 #include "dc_trace.h"
 
+#include "hw_sequencer_private.h"
+
 #include "dce/dmub_outbox.h"
 
 #define CTX \
@@ -1057,6 +1059,44 @@ static void apply_ctx_interdependent_lock(struct dc *dc, struct dc_state *contex
        }
 }
 
+static void phantom_pipe_blank(
+               struct dc *dc,
+               struct timing_generator *tg,
+               int width,
+               int height)
+{
+       struct dce_hwseq *hws = dc->hwseq;
+       enum dc_color_space color_space;
+       struct tg_color black_color = {0};
+       struct output_pixel_processor *opp = NULL;
+       uint32_t num_opps, opp_id_src0, opp_id_src1;
+       uint32_t otg_active_width, otg_active_height;
+
+       /* program opp dpg blank color */
+       color_space = COLOR_SPACE_SRGB;
+       color_space_to_black_color(dc, color_space, &black_color);
+
+       otg_active_width = width;
+       otg_active_height = height;
+
+       /* get the OPTC source */
+       tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1);
+       ASSERT(opp_id_src0 < dc->res_pool->res_cap->num_opp);
+       opp = dc->res_pool->opps[opp_id_src0];
+
+       opp->funcs->opp_set_disp_pattern_generator(
+                       opp,
+                       CONTROLLER_DP_TEST_PATTERN_SOLID_COLOR,
+                       CONTROLLER_DP_COLOR_SPACE_UDEFINED,
+                       COLOR_DEPTH_UNDEFINED,
+                       &black_color,
+                       otg_active_width,
+                       otg_active_height,
+                       0);
+
+       hws->funcs.wait_for_blank_complete(opp);
+}
+
 static void disable_dangling_plane(struct dc *dc, struct dc_state *context)
 {
        int i, j;
@@ -1115,8 +1155,13 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context)
                         * again for different use.
                         */
                        if (old_stream->mall_stream_config.type == SUBVP_PHANTOM) {
-                               if (tg->funcs->enable_crtc)
+                               if (tg->funcs->enable_crtc) {
+                                       int main_pipe_width, main_pipe_height;
+                                       main_pipe_width = old_stream->mall_stream_config.paired_stream->dst.width;
+                                       main_pipe_height = old_stream->mall_stream_config.paired_stream->dst.height;
+                                       phantom_pipe_blank(dc, tg, main_pipe_width, main_pipe_height);
                                        tg->funcs->enable_crtc(tg);
+                               }
                        }
                        dc_rem_all_planes_for_stream(dc, old_stream, dangling_context);
                        disable_all_writeback_pipes_for_stream(dc, old_stream, dangling_context);