drm/amdgpu: correct acclerator check architecutre dump
authorHawking Zhang <Hawking.Zhang@amd.com>
Wed, 8 Nov 2023 09:08:49 +0000 (17:08 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 9 Nov 2023 22:02:26 +0000 (17:02 -0500)
So driver doesn't touch invalid aca entries.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h

index 3302f4a2938788a40f5749750f04d4aa5376e317..65926f3c708a6f56fbb4bfd364eca7a6c281f9c0 100644 (file)
@@ -202,10 +202,17 @@ int amdgpu_mca_smu_set_debug_mode(struct amdgpu_device *adev, bool enable)
 
 static void amdgpu_mca_smu_mca_bank_dump(struct amdgpu_device *adev, int idx, struct mca_bank_entry *entry)
 {
-       int i;
-
-       for (i = 0; i < ARRAY_SIZE(entry->regs); i++)
-               dev_dbg(adev->dev, "mca entry[%02d].regs[%02d]=0x%016llx\n", idx, i, entry->regs[i]);
+       dev_info(adev->dev, "[Hardware error] Accelerator Check Architecture events logged\n");
+       dev_info(adev->dev, "[Hardware error] aca entry[%02d].STATUS=0x%016llx\n",
+                idx, entry->regs[MCA_REG_IDX_STATUS]);
+       dev_info(adev->dev, "[Hardware error] aca entry[%02d].ADDR=0x%016llx\n",
+                idx, entry->regs[MCA_REG_IDX_ADDR]);
+       dev_info(adev->dev, "[Hardware error] aca entry[%02d].MISC0=0x%016llx\n",
+                idx, entry->regs[MCA_REG_IDX_MISC0]);
+       dev_info(adev->dev, "[Hardware error] aca entry[%02d].IPID=0x%016llx\n",
+                idx, entry->regs[MCA_REG_IDX_IPID]);
+       dev_info(adev->dev, "[Hardware error] aca entry[%02d].SYND=0x%016llx\n",
+                idx, entry->regs[MCA_REG_IDX_SYND]);
 }
 
 int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type, struct ras_err_data *err_data)
index 45f90edf228360324b26e5fae6727ca9330dfe1d..e4f30d20170fb48cebf6ee0975adc1d503d73c4f 100644 (file)
@@ -79,11 +79,9 @@ struct amdgpu_mca {
 };
 
 enum mca_reg_idx {
-       MCA_REG_IDX_CONTROL             = 0,
        MCA_REG_IDX_STATUS              = 1,
        MCA_REG_IDX_ADDR                = 2,
        MCA_REG_IDX_MISC0               = 3,
-       MCA_REG_IDX_CONFIG              = 4,
        MCA_REG_IDX_IPID                = 5,
        MCA_REG_IDX_SYND                = 6,
        MCA_REG_IDX_COUNT               = 16,