drm/i915/dg2: Remove Wa_15010599737
authorShekhar Chauhan <shekhar.chauhan@intel.com>
Mon, 14 Aug 2023 15:02:15 +0000 (20:32 +0530)
committerMatt Roper <matthew.d.roper@intel.com>
Tue, 15 Aug 2023 22:31:32 +0000 (15:31 -0700)
Since this Wa is specific to DirectX, this is not required on Linux.

Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230814150215.873941-1-shekhar.chauhan@intel.com
drivers/gpu/drm/i915/gt/intel_gt_regs.h
drivers/gpu/drm/i915/gt/intel_workarounds.c

index 2cdfb2f713d02631d4001553f2ac89b828d320ea..0e4c638fcbbf018b6f3fd25273f774450696ef0a 100644 (file)
 
 #define XEHP_CULLBIT1                          MCR_REG(0x6100)
 
-#define CHICKEN_RASTER_1                       MCR_REG(0x6204)
-#define   DIS_SF_ROUND_NEAREST_EVEN            REG_BIT(8)
-
 #define CHICKEN_RASTER_2                       MCR_REG(0x6208)
 #define   TBIMR_FAST_CLIP                      REG_BIT(5)
 
index 589d009032fcd3ce275cf51eed5a07d6abca1e8c..500d38ddce0c968b8b16cda6b279c5348e2e3beb 100644 (file)
@@ -798,9 +798,6 @@ static void dg2_ctx_workarounds_init(struct intel_engine_cs *engine,
            IS_DG2_G11(engine->i915) || IS_DG2_G12(engine->i915))
                wa_mcr_masked_en(wal, XEHP_PSS_MODE2, SCOREBOARD_STALL_FLUSH_CONTROL);
 
-       /* Wa_15010599737:dg2 */
-       wa_mcr_masked_en(wal, CHICKEN_RASTER_1, DIS_SF_ROUND_NEAREST_EVEN);
-
        /* Wa_18019271663:dg2 */
        wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
 }