serial2 = &uartb; /* GPS */
};
+ firmware {
+ trusted-foundations {
+ compatible = "tlm,trusted-foundations";
+ tlm,version-major = <2>;
+ tlm,version-minor = <8>;
+ };
+ };
+
memory@80000000 {
reg = <0x80000000 0x80000000>;
};
};
codec_default: pinmux-codec-default {
+ interrupt {
+ nvidia,pins = "gpio_w2_aud_pw2",
+ "gpio_w3_aud_pw3";
+ nvidia,function = "spi6";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
ldo1-en {
nvidia,pins = "sdmmc1_wp_n_pv3";
nvidia,function = "sdmmc1";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
+ };
- interrupt {
- nvidia,pins = "gpio_w2_aud_pw2",
- "gpio_w3_aud_pw3";
- nvidia,function = "spi6";
+ gpio_hall_sensor_default: pinmux-gpio-hall-sensor-default {
+ ulpi_data4_po5 {
+ nvidia,pins = "ulpi_data4_po5";
+ nvidia,function = "spi2";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
- gpio_hall_sensor_default: pinmux-gpio-hall-sensor-default {
- ulpi_data4_po5 {
- nvidia,pins = "ulpi_data4_po5";
- nvidia,function = "spi2";
- nvidia,pull = <TEGRA_PIN_PULL_UP>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- };
- };
-
hp_det_default: pinmux-hp-det-default {
gmi_iordy_pi5 {
nvidia,pins = "kb_row7_pr7";
};
sdmmc3_default: pinmux-sdmmc3-default {
+ drive_sdio3 {
+ nvidia,pins = "drive_sdio3";
+ nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,pull-down-strength = <22>;
+ nvidia,pull-up-strength = <36>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ };
+
sdmmc3_clk_pa6 {
nvidia,pins = "sdmmc3_clk_pa6";
nvidia,function = "sdmmc3";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
-
- drive_sdio3 {
- nvidia,pins = "drive_sdio3";
- nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
- nvidia,schmitt = <TEGRA_PIN_DISABLE>;
- nvidia,pull-down-strength = <22>;
- nvidia,pull-up-strength = <36>;
- nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
- nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
- };
};
sdmmc3_vdd_default: pinmux-sdmmc3-vdd-default {
pinctrl-0 = <&codec_default>;
};
+ temp_sensor: temperature-sensor@4c {
+ compatible = "onnn,nct1008";
+ reg = <0x4c>;
+
+ vcc-supply = <&vdd_3v3_sys>;
+ #thermal-sensor-cells = <1>;
+ };
+
motion-tracker@68 {
compatible = "invensense,mpu6500";
reg = <0x68>;
pinctrl-names = "default";
pinctrl-0 = <&imu_default>;
};
-
- temp_sensor: temperature-sensor@4c {
- compatible = "onnn,nct1008";
- reg = <0x4c>;
-
- vcc-supply = <&vdd_3v3_sys>;
- #thermal-sensor-cells = <1>;
- };
};
i2c@7000c400 {
#gpio-cells = <2>;
};
+ pinmux {
+ compatible = "ti,tps65913-pinctrl";
+ ti,palmas-enable-dvfs1;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&palmas_default>;
+
+ palmas_default: pinmux {
+ pin_gpio0 {
+ pins = "gpio0";
+ function = "gpio";
+ };
+
+ pin_gpio1 {
+ pins = "gpio1";
+ function = "gpio";
+ };
+
+ pin_gpio2 {
+ pins = "gpio2";
+ function = "gpio";
+ };
+
+ pin_gpio3 {
+ pins = "gpio3";
+ function = "gpio";
+ };
+
+ pin_gpio4 {
+ pins = "gpio4";
+ function = "gpio";
+ };
+
+ pin_gpio5 {
+ pins = "gpio5";
+ function = "gpio";
+ };
+
+ pin_gpio6 {
+ pins = "gpio6";
+ function = "gpio";
+ };
+
+ pin_gpio7 {
+ pins = "gpio7";
+ function = "gpio";
+ };
+
+ pin_powergood {
+ pins = "powergood";
+ function = "powergood";
+ };
+
+ pin_vac {
+ pins = "vac";
+ function = "vac";
+ };
+ };
+ };
+
pmic {
compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
interrupt-parent = <&palmas>;
interrupts = <8 0>;
};
-
- pinmux {
- compatible = "ti,tps65913-pinctrl";
- ti,palmas-enable-dvfs1;
-
- pinctrl-names = "default";
- pinctrl-0 = <&palmas_default>;
-
- palmas_default: pinmux {
- pin_powergood {
- pins = "powergood";
- function = "powergood";
- };
-
- pin_vac {
- pins = "vac";
- function = "vac";
- };
-
- pin_gpio0 {
- pins = "gpio0";
- function = "gpio";
- };
-
- pin_gpio1 {
- pins = "gpio1";
- function = "gpio";
- };
-
- pin_gpio2 {
- pins = "gpio2";
- function = "gpio";
- };
-
- pin_gpio3 {
- pins = "gpio3";
- function = "gpio";
- };
-
- pin_gpio4 {
- pins = "gpio4";
- function = "gpio";
- };
-
- pin_gpio5 {
- pins = "gpio5";
- function = "gpio";
- };
-
- pin_gpio6 {
- pins = "gpio6";
- function = "gpio";
- };
-
- pin_gpio7 {
- pins = "gpio7";
- function = "gpio";
- };
- };
- };
};
};
clock-output-names = "pmic-oscillator";
};
- firmware {
- trusted-foundations {
- compatible = "tlm,trusted-foundations";
- tlm,version-major = <2>;
- tlm,version-minor = <8>;
+ gpio-hall-sensor {
+ compatible = "gpio-keys";
+
+ label = "GPIO Hall Effect Sensor";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_hall_sensor_default>;
+
+ switch-hall-sensor {
+ label = "Hall Effect Sensor";
+ gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>;
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ linux,can-disable;
+ wakeup-source;
};
};
wakeup-source;
};
- button-volume-up {
- label = "Volume Up";
- gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
- debounce-interval = <10>;
- };
-
button-volume-down {
label = "Volume Down";
gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
debounce-interval = <10>;
};
- };
-
- gpio-hall-sensor {
- compatible = "gpio-keys";
-
- label = "GPIO Hall Effect Sensor";
- pinctrl-names = "default";
- pinctrl-0 = <&gpio_hall_sensor_default>;
-
- switch-hall-sensor {
- label = "Hall Effect Sensor";
- gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>;
- linux,input-type = <EV_SW>;
- linux,code = <SW_LID>;
- linux,can-disable;
- wakeup-source;
+ button-volume-up {
+ label = "Volume Up";
+ gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ debounce-interval = <10>;
};
};
#gpio-cells = <2>;
};
+ pinmux {
+ compatible = "ti,tps65913-pinctrl";
+ pinctrl-names = "default";
+ pinctrl-0 = <&palmas_default>;
+
+ palmas_default: pinmux {
+ pin_gpio6 {
+ pins = "gpio6";
+ function = "gpio";
+ };
+ };
+ };
+
pmic {
compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
smps1-in-supply = <&tps65090_dcdc3_reg>;
interrupt-parent = <&palmas>;
interrupts = <8 0>;
};
-
- pinmux {
- compatible = "ti,tps65913-pinctrl";
- pinctrl-names = "default";
- pinctrl-0 = <&palmas_default>;
-
- palmas_default: pinmux {
- pin_gpio6 {
- pins = "gpio6";
- function = "gpio";
- };
- };
- };
};
};
*
*/
+#include <dt-bindings/clock/tegra124-car.h>
+
/ {
clock@60006000 {
emc-timings-1 {
};
};
};
-};
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-1200000000-1100;
-};
+ opp-table-actmon {
+ /delete-node/ opp-1200000000;
+ };
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-1200000000;
+ opp-table-emc {
+ /delete-node/ opp-1200000000-1100;
+ };
};
};
};
+ gpio: gpio@6000d000 {
+ /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
+ pex-perst-n-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PEX_PERST_N";
+ };
+ };
+
/* Apalis UART1 */
serial@70006000 {
status = "okay";
vin-supply = <®_5v0>;
};
};
-
-&gpio {
- /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
- pex-perst-n-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "PEX_PERST_N";
- };
-};
};
};
+ gpio@6000d000 {
+ /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
+ pex-perst-n-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PEX_PERST_N";
+ };
+ };
+
/* Apalis UART1 */
serial@70006000 {
status = "okay";
vin-supply = <®_5v0>;
};
};
-
-&gpio {
- /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
- pex-perst-n-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "PEX_PERST_N";
- };
-};
vdd-supply = <®_vdd_gpu>;
};
+ gpio@6000d000 {
+ /* I210 Gigabit Ethernet Controller Reset */
+ lan-reset-n-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LAN_RESET_N";
+ };
+
+ /* Control MXM3 pin 26 Reset Module Output Carrier Input */
+ reset-moci-ctrl-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "RESET_MOCI_CTRL";
+ };
+ };
+
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
pinctrl-0 = <&as3722_default>;
as3722_default: pinmux {
+ gpio0-1-3-4-5-6 {
+ pins = "gpio0", "gpio1", "gpio3",
+ "gpio4", "gpio5", "gpio6";
+ bias-high-impedance;
+ };
+
gpio2-7 {
pins = "gpio2", /* PWR_EN_+V3.3 */
"gpio7"; /* +V1.6_LPO */
function = "gpio";
bias-pull-up;
};
-
- gpio0-1-3-4-5-6 {
- pins = "gpio0", "gpio1", "gpio3",
- "gpio4", "gpio5", "gpio6";
- bias-high-impedance;
- };
};
regulators {
};
};
- clk32k_in: osc3 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
-
cpus {
cpu@0 {
vdd-cpu-supply = <®_vdd_cpu>;
};
};
+ clk32k_in: osc3 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+
reg_1v05_avdd_hdmi_pll: regulator-1v05-avdd-hdmi-pll {
compatible = "regulator-fixed";
regulator-name = "+V1.05_AVDD_HDMI_PLL";
};
};
};
-
-&gpio {
- /* I210 Gigabit Ethernet Controller Reset */
- lan-reset-n-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "LAN_RESET_N";
- };
-
- /* Control MXM3 pin 26 Reset Module Output Carrier Input */
- reset-moci-ctrl-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "RESET_MOCI_CTRL";
- };
-};
vdd-supply = <®_vdd_gpu>;
};
+ gpio@6000d000 {
+ /* I210 Gigabit Ethernet Controller Reset */
+ lan-reset-n-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LAN_RESET_N";
+ };
+
+ /* Control MXM3 pin 26 Reset Module Output Carrier Input */
+ reset-moci-ctrl-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "RESET_MOCI_CTRL";
+ };
+ };
+
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
pinctrl-0 = <&as3722_default>;
as3722_default: pinmux {
+ gpio0-1-3-4-5-6 {
+ pins = "gpio0", "gpio1", "gpio3",
+ "gpio4", "gpio5", "gpio6";
+ bias-high-impedance;
+ };
+
gpio2-7 {
pins = "gpio2", /* PWR_EN_+V3.3 */
"gpio7"; /* +V1.6_LPO */
function = "gpio";
bias-pull-up;
};
-
- gpio0-1-3-4-5-6 {
- pins = "gpio0", "gpio1", "gpio3",
- "gpio4", "gpio5", "gpio6";
- bias-high-impedance;
- };
};
regulators {
};
};
- clk32k_in: osc3 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
-
cpus {
cpu@0 {
vdd-cpu-supply = <®_vdd_cpu>;
};
};
+ clk32k_in: osc3 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+
reg_1v05_avdd_hdmi_pll: regulator-1v05-avdd-hdmi-pll {
compatible = "regulator-fixed";
regulator-name = "+V1.05_AVDD_HDMI_PLL";
};
};
};
-
-&gpio {
- /* I210 Gigabit Ethernet Controller Reset */
- lan-reset-n-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "LAN_RESET_N";
- };
-
- /* Control MXM3 pin 26 Reset Module Output Carrier Input */
- reset-moci-ctrl-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "RESET_MOCI_CTRL";
- };
-};
// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/clock/tegra124-car.h>
+
/ {
clock@60006000 {
emc-timings-3 {
};
};
};
-};
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-1200000000-1100;
-};
+ opp-table-actmon {
+ /delete-node/ opp-1200000000;
+ };
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-1200000000;
+ opp-table-emc {
+ /delete-node/ opp-1200000000-1100;
+ };
};
};
};
- cec@70015000 {
- status = "okay";
- };
-
gpu@57000000 {
/*
* Node left disabled on purpose - the bootloader will enable
};
};
+ cec@70015000 {
+ status = "okay";
+ };
+
/* Serial ATA */
sata@70020000 {
status = "okay";
// SPDX-License-Identifier: GPL-2.0
-/ {
- apbmisc@70000800 {
- nvidia,long-ram-code;
- };
+#include <dt-bindings/clock/tegra124-car.h>
+
+/ {
clock@60006000 {
emc-timings-1 {
nvidia,ram-code = <1>;
};
};
+ apbmisc@70000800 {
+ nvidia,long-ram-code;
+ };
+
memory-controller@70019000 {
emc-timings-1 {
nvidia,ram-code = <1>;
};
};
};
-};
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-924000000-1100;
- /delete-node/ opp-1200000000-1100;
-};
+ opp-table-actmon {
+ /delete-node/ opp-924000000;
+ /delete-node/ opp-1200000000;
+ };
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-924000000;
- /delete-node/ opp-1200000000;
+ opp-table-emc {
+ /delete-node/ opp-924000000-1100;
+ /delete-node/ opp-1200000000-1100;
+ };
};
};
};
- mmc@700b0400 { /* SD Card on this bus */
- wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
- };
-
- sound {
- compatible = "nvidia,tegra-audio-max98090-nyan-big",
- "nvidia,tegra-audio-max98090-nyan",
- "nvidia,tegra-audio-max98090";
- nvidia,model = "GoogleNyanBig";
- };
-
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>;
};
};
};
+
+ mmc@700b0400 { /* SD Card on this bus */
+ wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
+ };
+
+ sound {
+ compatible = "nvidia,tegra-audio-max98090-nyan-big",
+ "nvidia,tegra-audio-max98090-nyan",
+ "nvidia,tegra-audio-max98090";
+ nvidia,model = "GoogleNyanBig";
+ };
};
// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/clock/tegra124-car.h>
+
/ {
clock@60006000 {
emc-timings-1 {
};
};
};
-};
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-924000000-1100;
- /delete-node/ opp-1200000000-1100;
-};
+ opp-table-actmon {
+ /delete-node/ opp-924000000;
+ /delete-node/ opp-1200000000;
+ };
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-924000000;
- /delete-node/ opp-1200000000;
+ opp-table-emc {
+ /delete-node/ opp-924000000-1100;
+ /delete-node/ opp-1200000000-1100;
+ };
};
};
};
- sound {
- compatible = "nvidia,tegra-audio-max98090-nyan-blaze",
- "nvidia,tegra-audio-max98090-nyan",
- "nvidia,tegra-audio-max98090";
- nvidia,model = "GoogleNyanBlaze";
- };
-
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>;
};
};
};
+
+ sound {
+ compatible = "nvidia,tegra-audio-max98090-nyan-blaze",
+ "nvidia,tegra-audio-max98090-nyan",
+ "nvidia,tegra-audio-max98090";
+ nvidia,model = "GoogleNyanBlaze";
+ };
};
};
};
- sdhci0_pwrseq: sdhci0_pwrseq {
- compatible = "mmc-pwrseq-simple";
-
- reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
- };
-
mmc@700b0000 { /* WiFi/BT on this bus */
status = "okay";
bus-width = <4>;
};
cpus {
- cpu@0 {
+ cpu0: cpu@0 {
+ #cooling-cells = <2>;
vdd-cpu-supply = <&vdd_cpu>;
};
+
+ cpu1: cpu@1 {
+ #cooling-cells = <2>;
+ };
+
+ cpu2: cpu@2 {
+ #cooling-cells = <2>;
+ };
+
+ cpu3: cpu@3 {
+ #cooling-cells = <2>;
+ };
};
gpio-keys {
compatible = "gpio-keys";
+ key-power {
+ label = "Power";
+ gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ debounce-interval = <30>;
+ wakeup-source;
+ };
+
switch-lid {
label = "Lid";
gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
debounce-interval = <1>;
wakeup-source;
};
+ };
- key-power {
- label = "Power";
- gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_POWER>;
- debounce-interval = <30>;
- wakeup-source;
- };
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
+ priority = <200>;
+ };
+
+ sdhci0_pwrseq: pwrseq-sdhci0 {
+ compatible = "mmc-pwrseq-simple";
+
+ reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
};
vdd_mux: regulator-mux {
<&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
};
- gpio-restart {
- compatible = "gpio-restart";
- gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
- priority = <200>;
- };
-
- cpus {
- cpu0: cpu@0 {
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- #cooling-cells = <2>;
- };
-
- cpu2: cpu@2 {
- #cooling-cells = <2>;
- };
-
- cpu3: cpu@3 {
- #cooling-cells = <2>;
- };
- };
-
thermal-zones {
cpu-skin-thermal {
polling-delay-passive = <1000>; /* milliseconds */
reset-names = "fuse";
};
+ cec@70015000 {
+ compatible = "nvidia,tegra124-cec";
+ reg = <0x0 0x70015000 0x0 0x00001000>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA124_CLK_CEC>;
+ clock-names = "cec";
+ status = "disabled";
+ hdmi-phandle = <&hdmi>;
+ };
+
mc: memory-controller@70019000 {
compatible = "nvidia,tegra124-mc";
reg = <0x0 0x70019000 0x0 0x1000>;
status = "disabled";
};
- cec@70015000 {
- compatible = "nvidia,tegra124-cec";
- reg = <0x0 0x70015000 0x0 0x00001000>;
- interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_CEC>;
- clock-names = "cec";
- status = "disabled";
- hdmi-phandle = <&hdmi>;
- };
-
soctherm: thermal-sensor@700e2000 {
compatible = "nvidia,tegra124-soctherm";
reg = <0x0 0x700e2000 0x0 0x600>, /* SOC_THERM reg_base */
nvidia,pins = "ddc";
nvidia,function = "i2c2";
};
+
pta {
nvidia,pins = "pta";
nvidia,function = "rsvd4";
};
};
- state_i2cmux_pta: pinmux-i2cmux-pta {
+ state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
+
pta {
nvidia,pins = "pta";
- nvidia,function = "i2c2";
+ nvidia,function = "rsvd4";
};
};
- state_i2cmux_idle: pinmux-i2cmux-idle {
+ state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
+
pta {
nvidia,pins = "pta";
- nvidia,function = "rsvd4";
+ nvidia,function = "i2c2";
};
};
};
/* Docking station */
};
+ pwm: pwm@7000a000 {
+ status = "okay";
+ };
+
i2c@7000c000 {
clock-frequency = <400000>;
status = "okay";
status = "okay";
};
- i2cmux {
- compatible = "i2c-mux-pinctrl";
- #address-cells = <1>;
- #size-cells = <0>;
-
- i2c-parent = <&{/i2c@7000c400}>;
-
- pinctrl-names = "ddc", "pta", "idle";
- pinctrl-0 = <&state_i2cmux_ddc>;
- pinctrl-1 = <&state_i2cmux_pta>;
- pinctrl-2 = <&state_i2cmux_idle>;
-
- hdmi_ddc: i2c@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- panel_ddc: i2c@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- embedded-controller@58 {
- compatible = "acer,a500-iconia-ec", "ene,kb930";
- reg = <0x58>;
-
- system-power-controller;
-
- monitored-battery = <&bat1010>;
- power-supplies = <&mains>;
- };
- };
- };
-
- pwm: pwm@7000a000 {
- status = "okay";
- };
-
i2c@7000d000 {
clock-frequency = <100000>;
status = "okay";
core-supply = <&vdd_core>;
};
- usb@c5000000 {
- compatible = "nvidia,tegra20-udc";
- status = "okay";
- dr_mode = "peripheral";
- };
+ memory-controller@7000f400 {
+ nvidia,use-ram-code;
- usb-phy@c5000000 {
- status = "okay";
- dr_mode = "peripheral";
- nvidia,xcvr-setup-use-fuses;
- nvidia,xcvr-lsfslew = <2>;
- nvidia,xcvr-lsrslew = <2>;
- };
+ emc-tables@0 {
+ nvidia,ram-code = <0>; /* elpida-8gb */
+ reg = <0>;
- usb@c5008000 {
- status = "okay";
- };
+ #address-cells = <1>;
+ #size-cells = <0>;
- usb-phy@c5008000 {
- status = "okay";
- nvidia,xcvr-setup-use-fuses;
- nvidia,xcvr-lsfslew = <2>;
- nvidia,xcvr-lsrslew = <2>;
- vbus-supply = <&vdd_5v0_sys>;
- };
+ emc-table@25000 {
+ reg = <25000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <25000>;
+ nvidia,emc-registers = <0x00000002 0x00000006
+ 0x00000003 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000004
+ 0x00000003 0x00000008 0x0000000b 0x0000004d
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000004
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000068 0x00000000 0x00000003
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x00070000 0x00000000 0x00000000 0x00000003
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
- brcm_wifi_pwrseq: wifi-pwrseq {
- compatible = "mmc-pwrseq-simple";
+ emc-table@50000 {
+ reg = <50000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <50000>;
+ nvidia,emc-registers = <0x00000003 0x00000007
+ 0x00000003 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x0000009f
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000007
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x000000d0 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x00070000 0x00000000 0x00000000 0x00000005
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
- clocks = <&rtc_32k_wifi>;
- clock-names = "ext_clock";
+ emc-table@75000 {
+ reg = <75000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <75000>;
+ nvidia,emc-registers = <0x00000005 0x0000000a
+ 0x00000004 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x000000ff
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x0000000b
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000138 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x00070000 0x00000000 0x00000000 0x00000007
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
- reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
- post-power-on-delay-ms = <300>;
- power-off-delay-us = <300>;
- };
+ emc-table@150000 {
+ reg = <150000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <150000>;
+ nvidia,emc-registers = <0x00000009 0x00000014
+ 0x00000007 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x0000021f
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000015
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000270 0x00000000 0x00000001
+ 0x00000000 0x00000000 0x00000282 0xa07c04ae
+ 0x007dd510 0x00000000 0x00000000 0x0000000e
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
- sdmmc1: mmc@c8000000 {
- status = "okay";
+ emc-table@300000 {
+ reg = <300000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <300000>;
+ nvidia,emc-registers = <0x00000012 0x00000027
+ 0x0000000d 0x00000006 0x00000007 0x00000005
+ 0x00000003 0x00000009 0x00000006 0x00000006
+ 0x00000003 0x00000003 0x00000002 0x00000006
+ 0x00000003 0x00000009 0x0000000c 0x0000045f
+ 0x00000000 0x00000004 0x00000004 0x00000006
+ 0x00000008 0x00000001 0x0000000e 0x0000002a
+ 0x00000003 0x0000000f 0x00000007 0x00000005
+ 0x00000002 0x000004e1 0x00000005 0x00000002
+ 0x00000000 0x00000000 0x00000282 0xe059048b
+ 0x007e1510 0x00000000 0x00000000 0x0000001b
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+ };
- #address-cells = <1>;
- #size-cells = <0>;
+ emc-tables@1 {
+ nvidia,ram-code = <1>; /* elpida-4gb */
+ reg = <1>;
- assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
- assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
- assigned-clock-rates = <50000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- max-frequency = <50000000>;
- keep-power-in-suspend;
- bus-width = <4>;
- non-removable;
+ emc-table@25000 {
+ reg = <25000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <25000>;
+ nvidia,emc-registers = <0x00000002 0x00000006
+ 0x00000003 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000004
+ 0x00000003 0x00000008 0x0000000b 0x0000004d
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000004
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000068 0x00000000 0x00000003
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x0007c000 0x00000000 0x00000000 0x00000003
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
- mmc-pwrseq = <&brcm_wifi_pwrseq>;
- vmmc-supply = <&vdd_3v3_sys>;
- vqmmc-supply = <&vdd_1v8_sys>;
+ emc-table@50000 {
+ reg = <50000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <50000>;
+ nvidia,emc-registers = <0x00000003 0x00000007
+ 0x00000003 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x0000009f
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000007
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x000000d0 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x0007c000 0x00000000 0x00000000 0x00000005
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
- /* Azurewave AW-NH611 BCM4329 */
- wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- };
- };
+ emc-table@75000 {
+ reg = <75000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <75000>;
+ nvidia,emc-registers = <0x00000005 0x0000000a
+ 0x00000004 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x000000ff
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x0000000b
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000138 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x0007c000 0x00000000 0x00000000 0x00000007
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@150000 {
+ reg = <150000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <150000>;
+ nvidia,emc-registers = <0x00000009 0x00000014
+ 0x00000007 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x0000021f
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000015
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000270 0x00000000 0x00000001
+ 0x00000000 0x00000000 0x00000282 0xa07c04ae
+ 0x007e4010 0x00000000 0x00000000 0x0000000e
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@300000 {
+ reg = <300000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <300000>;
+ nvidia,emc-registers = <0x00000012 0x00000027
+ 0x0000000d 0x00000006 0x00000007 0x00000005
+ 0x00000003 0x00000009 0x00000006 0x00000006
+ 0x00000003 0x00000003 0x00000002 0x00000006
+ 0x00000003 0x00000009 0x0000000c 0x0000045f
+ 0x00000000 0x00000004 0x00000004 0x00000006
+ 0x00000008 0x00000001 0x0000000e 0x0000002a
+ 0x00000003 0x0000000f 0x00000007 0x00000005
+ 0x00000002 0x000004e1 0x00000005 0x00000002
+ 0x00000000 0x00000000 0x00000282 0xe059048b
+ 0x007e0010 0x00000000 0x00000000 0x0000001b
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+ };
+
+ emc-tables@2 {
+ nvidia,ram-code = <2>; /* hynix-8gb */
+ reg = <2>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ emc-table@25000 {
+ reg = <25000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <25000>;
+ nvidia,emc-registers = <0x00000002 0x00000006
+ 0x00000003 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000004
+ 0x00000003 0x00000008 0x0000000b 0x0000004d
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000004
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000068 0x00000000 0x00000003
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x00070000 0x00000000 0x00000000 0x00000003
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@50000 {
+ reg = <50000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <50000>;
+ nvidia,emc-registers = <0x00000003 0x00000007
+ 0x00000003 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x0000009f
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000007
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x000000d0 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x00070000 0x00000000 0x00000000 0x00000005
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@75000 {
+ reg = <75000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <75000>;
+ nvidia,emc-registers = <0x00000005 0x0000000a
+ 0x00000004 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x000000ff
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x0000000b
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000138 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x00070000 0x00000000 0x00000000 0x00000007
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@150000 {
+ reg = <150000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <150000>;
+ nvidia,emc-registers = <0x00000009 0x00000014
+ 0x00000007 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x0000021f
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000015
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000270 0x00000000 0x00000001
+ 0x00000000 0x00000000 0x00000282 0xa07c04ae
+ 0x007dd010 0x00000000 0x00000000 0x0000000e
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@300000 {
+ reg = <300000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <300000>;
+ nvidia,emc-registers = <0x00000012 0x00000027
+ 0x0000000d 0x00000006 0x00000007 0x00000005
+ 0x00000003 0x00000009 0x00000006 0x00000006
+ 0x00000003 0x00000003 0x00000002 0x00000006
+ 0x00000003 0x00000009 0x0000000c 0x0000045f
+ 0x00000000 0x00000004 0x00000004 0x00000006
+ 0x00000008 0x00000001 0x0000000e 0x0000002a
+ 0x00000003 0x0000000f 0x00000007 0x00000005
+ 0x00000002 0x000004e1 0x00000005 0x00000002
+ 0x00000000 0x00000000 0x00000282 0xe059048b
+ 0x007e2010 0x00000000 0x00000000 0x0000001b
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+ };
+
+ emc-tables@3 {
+ nvidia,ram-code = <3>; /* hynix-4gb */
+ reg = <3>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ emc-table@25000 {
+ reg = <25000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <25000>;
+ nvidia,emc-registers = <0x00000002 0x00000006
+ 0x00000003 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000004
+ 0x00000003 0x00000008 0x0000000b 0x0000004d
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000004
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000068 0x00000000 0x00000003
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x0007c000 0x00000000 0x00000000 0x00000003
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@50000 {
+ reg = <50000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <50000>;
+ nvidia,emc-registers = <0x00000003 0x00000007
+ 0x00000003 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x0000009f
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000007
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x000000d0 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x0007c000 0x00078000 0x00000000 0x00000005
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@75000 {
+ reg = <75000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <75000>;
+ nvidia,emc-registers = <0x00000005 0x0000000a
+ 0x00000004 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x000000ff
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x0000000b
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000138 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000282 0xa0ae04ae
+ 0x0007c000 0x00000000 0x00000000 0x00000007
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@150000 {
+ reg = <150000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <150000>;
+ nvidia,emc-registers = <0x00000009 0x00000014
+ 0x00000007 0x00000003 0x00000006 0x00000004
+ 0x00000002 0x00000009 0x00000003 0x00000003
+ 0x00000002 0x00000002 0x00000002 0x00000005
+ 0x00000003 0x00000008 0x0000000b 0x0000021f
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000008 0x00000001 0x0000000a 0x00000015
+ 0x00000003 0x00000008 0x00000004 0x00000006
+ 0x00000002 0x00000270 0x00000000 0x00000001
+ 0x00000000 0x00000000 0x00000282 0xa07c04ae
+ 0x007e4010 0x00000000 0x00000000 0x0000000e
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@300000 {
+ reg = <300000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <300000>;
+ nvidia,emc-registers = <0x00000012 0x00000027
+ 0x0000000d 0x00000006 0x00000007 0x00000005
+ 0x00000003 0x00000009 0x00000006 0x00000006
+ 0x00000003 0x00000003 0x00000002 0x00000006
+ 0x00000003 0x00000009 0x0000000c 0x0000045f
+ 0x00000000 0x00000004 0x00000004 0x00000006
+ 0x00000008 0x00000001 0x0000000e 0x0000002a
+ 0x00000003 0x0000000f 0x00000007 0x00000005
+ 0x00000002 0x000004e1 0x00000005 0x00000002
+ 0x00000000 0x00000000 0x00000282 0xe059048b
+ 0x007e0010 0x00000000 0x00000000 0x0000001b
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+ };
+ };
+
+ usb@c5000000 {
+ compatible = "nvidia,tegra20-udc";
+ status = "okay";
+ dr_mode = "peripheral";
+ };
+
+ usb-phy@c5000000 {
+ status = "okay";
+ dr_mode = "peripheral";
+ nvidia,xcvr-setup-use-fuses;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ };
+
+ usb@c5008000 {
+ status = "okay";
+ };
+
+ usb-phy@c5008000 {
+ status = "okay";
+ nvidia,xcvr-setup-use-fuses;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ vbus-supply = <&vdd_5v0_sys>;
+ };
+
+ sdmmc1: mmc@c8000000 {
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
+ assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
+ assigned-clock-rates = <50000000>;
+
+ max-frequency = <50000000>;
+ keep-power-in-suspend;
+ bus-width = <4>;
+ non-removable;
+
+ mmc-pwrseq = <&brcm_wifi_pwrseq>;
+ vmmc-supply = <&vdd_3v3_sys>;
+ vqmmc-supply = <&vdd_1v8_sys>;
+
+ /* Azurewave AW-NH611 BCM4329 */
+ wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ };
+ };
sdmmc3: mmc@c8000400 {
status = "okay";
debounce-interval = <10>;
};
- key-volume-up {
- label = "Volume Up";
- gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
+ key-volume-down {
+ label = "Volume Down";
+ gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
- key-volume-down {
- label = "Volume Down";
- gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
+ key-volume-up {
+ label = "Volume Up";
+ gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
vcc-supply = <&vdd_3v3_sys>;
};
- lvds-encoder {
- compatible = "ti,sn75lvds83", "lvds-encoder";
+ i2cmux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
- powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
- power-supply = <&vdd_3v3_sys>;
+ i2c-parent = <&{/i2c@7000c400}>;
- ports {
+ pinctrl-names = "ddc", "pta", "idle";
+ pinctrl-0 = <&state_i2cmux_ddc>;
+ pinctrl-1 = <&state_i2cmux_pta>;
+ pinctrl-2 = <&state_i2cmux_idle>;
+
+ hdmi_ddc: i2c@0 {
+ reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- lvds_encoder_input: endpoint {
- remote-endpoint = <&lcd_output>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- lvds_encoder_output: endpoint {
- remote-endpoint = <&panel_input>;
- };
- };
};
- };
-
- vdd_5v0_sys: regulator-5v0 {
- compatible = "regulator-fixed";
- regulator-name = "vdd_5v0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vdd_3v3_sys: regulator-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vdd_3v3_vs";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- vin-supply = <&vdd_5v0_sys>;
- };
- vdd_1v8_sys: regulator-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "vdd_1v8_vs";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- vin-supply = <&vdd_5v0_sys>;
- };
-
- vdd_pnl: regulator-panel {
- compatible = "regulator-fixed";
- regulator-name = "vdd_panel";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <300000>;
- gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_5v0_sys>;
- };
-
- sound {
- compatible = "nvidia,tegra-audio-wm8903-picasso",
- "nvidia,tegra-audio-wm8903";
- nvidia,model = "Acer Iconia Tab A500 WM8903";
-
- nvidia,audio-routing =
- "Headphone Jack", "HPOUTR",
- "Headphone Jack", "HPOUTL",
- "Int Spk", "LINEOUTL",
- "Int Spk", "LINEOUTR",
- "Mic Jack", "MICBIAS",
- "IN2L", "Mic Jack",
- "IN2R", "Mic Jack",
- "IN1L", "Int Mic",
- "IN1R", "Int Mic";
-
- nvidia,i2s-controller = <&tegra_i2s1>;
- nvidia,audio-codec = <&wm8903>;
-
- nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
- nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
- nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
- nvidia,headset;
-
- clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
- <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
- <&tegra_car TEGRA20_CLK_CDEV1>;
- clock-names = "pll_a", "pll_a_out0", "mclk";
- };
-
- thermal-zones {
- /*
- * NCT1008 has two sensors:
- *
- * 0: internal that monitors ambient/skin temperature
- * 1: external that is connected to the CPU's diode
- *
- * Ideally we should use userspace thermal governor,
- * but it's a much more complex solution. The "skin"
- * zone is a simpler solution which prevents A500 from
- * getting too hot from a user's tactile perspective.
- * The CPU zone is intended to protect silicon from damage.
- */
-
- skin-thermal {
- polling-delay-passive = <1000>; /* milliseconds */
- polling-delay = <5000>; /* milliseconds */
-
- thermal-sensors = <&nct1008 0>;
-
- trips {
- trip0: skin-alert {
- /* start throttling at 60C */
- temperature = <60000>;
- hysteresis = <200>;
- type = "passive";
- };
-
- trip1: skin-crit {
- /* shut down at 70C */
- temperature = <70000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&trip0>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu-thermal {
- polling-delay-passive = <1000>; /* milliseconds */
- polling-delay = <5000>; /* milliseconds */
-
- thermal-sensors = <&nct1008 1>;
-
- trips {
- trip2: cpu-alert {
- /* throttle at 85C until temperature drops to 84.8C */
- temperature = <85000>;
- hysteresis = <200>;
- type = "passive";
- };
-
- trip3: cpu-crit {
- /* shut down at 90C */
- temperature = <90000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
+ panel_ddc: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- cooling-maps {
- map1 {
- trip = <&trip2>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
+ embedded-controller@58 {
+ compatible = "acer,a500-iconia-ec", "ene,kb930";
+ reg = <0x58>;
+
+ system-power-controller;
+
+ monitored-battery = <&bat1010>;
+ power-supplies = <&mains>;
};
};
};
- memory-controller@7000f400 {
- nvidia,use-ram-code;
+ lvds-encoder {
+ compatible = "ti,sn75lvds83", "lvds-encoder";
- emc-tables@0 {
- nvidia,ram-code = <0>; /* elpida-8gb */
- reg = <0>;
+ powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
+ power-supply = <&vdd_3v3_sys>;
+ ports {
#address-cells = <1>;
#size-cells = <0>;
- emc-table@25000 {
- reg = <25000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <25000>;
- nvidia,emc-registers = <0x00000002 0x00000006
- 0x00000003 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000004
- 0x00000003 0x00000008 0x0000000b 0x0000004d
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000004
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000068 0x00000000 0x00000003
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x00070000 0x00000000 0x00000000 0x00000003
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
-
- emc-table@50000 {
- reg = <50000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <50000>;
- nvidia,emc-registers = <0x00000003 0x00000007
- 0x00000003 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x0000009f
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000007
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x000000d0 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x00070000 0x00000000 0x00000000 0x00000005
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ port@0 {
+ reg = <0>;
- emc-table@75000 {
- reg = <75000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <75000>;
- nvidia,emc-registers = <0x00000005 0x0000000a
- 0x00000004 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x000000ff
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x0000000b
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000138 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x00070000 0x00000000 0x00000000 0x00000007
- 0x00000000 0x00000000 0x00000000 0x00000000>;
+ lvds_encoder_input: endpoint {
+ remote-endpoint = <&lcd_output>;
+ };
};
- emc-table@150000 {
- reg = <150000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <150000>;
- nvidia,emc-registers = <0x00000009 0x00000014
- 0x00000007 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x0000021f
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000015
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000270 0x00000000 0x00000001
- 0x00000000 0x00000000 0x00000282 0xa07c04ae
- 0x007dd510 0x00000000 0x00000000 0x0000000e
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ port@1 {
+ reg = <1>;
- emc-table@300000 {
- reg = <300000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <300000>;
- nvidia,emc-registers = <0x00000012 0x00000027
- 0x0000000d 0x00000006 0x00000007 0x00000005
- 0x00000003 0x00000009 0x00000006 0x00000006
- 0x00000003 0x00000003 0x00000002 0x00000006
- 0x00000003 0x00000009 0x0000000c 0x0000045f
- 0x00000000 0x00000004 0x00000004 0x00000006
- 0x00000008 0x00000001 0x0000000e 0x0000002a
- 0x00000003 0x0000000f 0x00000007 0x00000005
- 0x00000002 0x000004e1 0x00000005 0x00000002
- 0x00000000 0x00000000 0x00000282 0xe059048b
- 0x007e1510 0x00000000 0x00000000 0x0000001b
- 0x00000000 0x00000000 0x00000000 0x00000000>;
+ lvds_encoder_output: endpoint {
+ remote-endpoint = <&panel_input>;
+ };
};
};
+ };
- emc-tables@1 {
- nvidia,ram-code = <1>; /* elpida-4gb */
- reg = <1>;
+ opp-table-emc {
+ /delete-node/ opp-666000000;
+ /delete-node/ opp-760000000;
+ };
- #address-cells = <1>;
- #size-cells = <0>;
+ vdd_5v0_sys: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
- emc-table@25000 {
- reg = <25000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <25000>;
- nvidia,emc-registers = <0x00000002 0x00000006
- 0x00000003 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000004
- 0x00000003 0x00000008 0x0000000b 0x0000004d
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000004
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000068 0x00000000 0x00000003
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x0007c000 0x00000000 0x00000000 0x00000003
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ vdd_3v3_sys: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_3v3_vs";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- emc-table@50000 {
- reg = <50000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <50000>;
- nvidia,emc-registers = <0x00000003 0x00000007
- 0x00000003 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x0000009f
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000007
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x000000d0 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x0007c000 0x00000000 0x00000000 0x00000005
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ vdd_1v8_sys: regulator-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_1v8_vs";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- emc-table@75000 {
- reg = <75000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <75000>;
- nvidia,emc-registers = <0x00000005 0x0000000a
- 0x00000004 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x000000ff
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x0000000b
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000138 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x0007c000 0x00000000 0x00000000 0x00000007
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ vdd_pnl: regulator-panel {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_panel";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <300000>;
+ gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- emc-table@150000 {
- reg = <150000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <150000>;
- nvidia,emc-registers = <0x00000009 0x00000014
- 0x00000007 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x0000021f
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000015
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000270 0x00000000 0x00000001
- 0x00000000 0x00000000 0x00000282 0xa07c04ae
- 0x007e4010 0x00000000 0x00000000 0x0000000e
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ sound {
+ compatible = "nvidia,tegra-audio-wm8903-picasso",
+ "nvidia,tegra-audio-wm8903";
+ nvidia,model = "Acer Iconia Tab A500 WM8903";
- emc-table@300000 {
- reg = <300000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <300000>;
- nvidia,emc-registers = <0x00000012 0x00000027
- 0x0000000d 0x00000006 0x00000007 0x00000005
- 0x00000003 0x00000009 0x00000006 0x00000006
- 0x00000003 0x00000003 0x00000002 0x00000006
- 0x00000003 0x00000009 0x0000000c 0x0000045f
- 0x00000000 0x00000004 0x00000004 0x00000006
- 0x00000008 0x00000001 0x0000000e 0x0000002a
- 0x00000003 0x0000000f 0x00000007 0x00000005
- 0x00000002 0x000004e1 0x00000005 0x00000002
- 0x00000000 0x00000000 0x00000282 0xe059048b
- 0x007e0010 0x00000000 0x00000000 0x0000001b
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
- };
+ nvidia,audio-routing =
+ "Headphone Jack", "HPOUTR",
+ "Headphone Jack", "HPOUTL",
+ "Int Spk", "LINEOUTL",
+ "Int Spk", "LINEOUTR",
+ "Mic Jack", "MICBIAS",
+ "IN2L", "Mic Jack",
+ "IN2R", "Mic Jack",
+ "IN1L", "Int Mic",
+ "IN1R", "Int Mic";
+
+ nvidia,i2s-controller = <&tegra_i2s1>;
+ nvidia,audio-codec = <&wm8903>;
+
+ nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
+ nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
+ nvidia,headset;
- emc-tables@2 {
- nvidia,ram-code = <2>; /* hynix-8gb */
- reg = <2>;
+ clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
+ <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
+ <&tegra_car TEGRA20_CLK_CDEV1>;
+ clock-names = "pll_a", "pll_a_out0", "mclk";
+ };
- #address-cells = <1>;
- #size-cells = <0>;
+ thermal-zones {
+ /*
+ * NCT1008 has two sensors:
+ *
+ * 0: internal that monitors ambient/skin temperature
+ * 1: external that is connected to the CPU's diode
+ *
+ * Ideally we should use userspace thermal governor,
+ * but it's a much more complex solution. The "skin"
+ * zone is a simpler solution which prevents A500 from
+ * getting too hot from a user's tactile perspective.
+ * The CPU zone is intended to protect silicon from damage.
+ */
- emc-table@25000 {
- reg = <25000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <25000>;
- nvidia,emc-registers = <0x00000002 0x00000006
- 0x00000003 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000004
- 0x00000003 0x00000008 0x0000000b 0x0000004d
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000004
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000068 0x00000000 0x00000003
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x00070000 0x00000000 0x00000000 0x00000003
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ skin-thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
- emc-table@50000 {
- reg = <50000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <50000>;
- nvidia,emc-registers = <0x00000003 0x00000007
- 0x00000003 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x0000009f
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000007
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x000000d0 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x00070000 0x00000000 0x00000000 0x00000005
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ thermal-sensors = <&nct1008 0>;
- emc-table@75000 {
- reg = <75000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <75000>;
- nvidia,emc-registers = <0x00000005 0x0000000a
- 0x00000004 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x000000ff
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x0000000b
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000138 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x00070000 0x00000000 0x00000000 0x00000007
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ trips {
+ trip0: skin-alert {
+ /* start throttling at 60C */
+ temperature = <60000>;
+ hysteresis = <200>;
+ type = "passive";
+ };
- emc-table@150000 {
- reg = <150000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <150000>;
- nvidia,emc-registers = <0x00000009 0x00000014
- 0x00000007 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x0000021f
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000015
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000270 0x00000000 0x00000001
- 0x00000000 0x00000000 0x00000282 0xa07c04ae
- 0x007dd010 0x00000000 0x00000000 0x0000000e
- 0x00000000 0x00000000 0x00000000 0x00000000>;
+ trip1: skin-crit {
+ /* shut down at 70C */
+ temperature = <70000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
};
- emc-table@300000 {
- reg = <300000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <300000>;
- nvidia,emc-registers = <0x00000012 0x00000027
- 0x0000000d 0x00000006 0x00000007 0x00000005
- 0x00000003 0x00000009 0x00000006 0x00000006
- 0x00000003 0x00000003 0x00000002 0x00000006
- 0x00000003 0x00000009 0x0000000c 0x0000045f
- 0x00000000 0x00000004 0x00000004 0x00000006
- 0x00000008 0x00000001 0x0000000e 0x0000002a
- 0x00000003 0x0000000f 0x00000007 0x00000005
- 0x00000002 0x000004e1 0x00000005 0x00000002
- 0x00000000 0x00000000 0x00000282 0xe059048b
- 0x007e2010 0x00000000 0x00000000 0x0000001b
- 0x00000000 0x00000000 0x00000000 0x00000000>;
+ cooling-maps {
+ map0 {
+ trip = <&trip0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
};
};
- emc-tables@3 {
- nvidia,ram-code = <3>; /* hynix-4gb */
- reg = <3>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- emc-table@25000 {
- reg = <25000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <25000>;
- nvidia,emc-registers = <0x00000002 0x00000006
- 0x00000003 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000004
- 0x00000003 0x00000008 0x0000000b 0x0000004d
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000004
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000068 0x00000000 0x00000003
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x0007c000 0x00000000 0x00000000 0x00000003
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ cpu-thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
- emc-table@50000 {
- reg = <50000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <50000>;
- nvidia,emc-registers = <0x00000003 0x00000007
- 0x00000003 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x0000009f
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000007
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x000000d0 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x0007c000 0x00078000 0x00000000 0x00000005
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ thermal-sensors = <&nct1008 1>;
- emc-table@75000 {
- reg = <75000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <75000>;
- nvidia,emc-registers = <0x00000005 0x0000000a
- 0x00000004 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x000000ff
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x0000000b
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000138 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000282 0xa0ae04ae
- 0x0007c000 0x00000000 0x00000000 0x00000007
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
+ trips {
+ trip2: cpu-alert {
+ /* throttle at 85C until temperature drops to 84.8C */
+ temperature = <85000>;
+ hysteresis = <200>;
+ type = "passive";
+ };
- emc-table@150000 {
- reg = <150000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <150000>;
- nvidia,emc-registers = <0x00000009 0x00000014
- 0x00000007 0x00000003 0x00000006 0x00000004
- 0x00000002 0x00000009 0x00000003 0x00000003
- 0x00000002 0x00000002 0x00000002 0x00000005
- 0x00000003 0x00000008 0x0000000b 0x0000021f
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000008 0x00000001 0x0000000a 0x00000015
- 0x00000003 0x00000008 0x00000004 0x00000006
- 0x00000002 0x00000270 0x00000000 0x00000001
- 0x00000000 0x00000000 0x00000282 0xa07c04ae
- 0x007e4010 0x00000000 0x00000000 0x0000000e
- 0x00000000 0x00000000 0x00000000 0x00000000>;
+ trip3: cpu-crit {
+ /* shut down at 90C */
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
};
- emc-table@300000 {
- reg = <300000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <300000>;
- nvidia,emc-registers = <0x00000012 0x00000027
- 0x0000000d 0x00000006 0x00000007 0x00000005
- 0x00000003 0x00000009 0x00000006 0x00000006
- 0x00000003 0x00000003 0x00000002 0x00000006
- 0x00000003 0x00000009 0x0000000c 0x0000045f
- 0x00000000 0x00000004 0x00000004 0x00000006
- 0x00000008 0x00000001 0x0000000e 0x0000002a
- 0x00000003 0x0000000f 0x00000007 0x00000005
- 0x00000002 0x000004e1 0x00000005 0x00000002
- 0x00000000 0x00000000 0x00000282 0xe059048b
- 0x007e0010 0x00000000 0x00000000 0x0000001b
- 0x00000000 0x00000000 0x00000000 0x00000000>;
+ cooling-maps {
+ map1 {
+ trip = <&trip2>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
};
};
};
-};
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-666000000;
- /delete-node/ opp-760000000;
+ brcm_wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+
+ clocks = <&rtc_32k_wifi>;
+ clock-names = "ext_clock";
+
+ reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <300>;
+ power-off-delay-us = <300>;
+ };
};
};
};
- state_i2cmux_pta: pinmux-i2cmux-pta {
+ state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
pta {
nvidia,pins = "pta";
- nvidia,function = "i2c2";
+ nvidia,function = "rsvd4";
};
};
- state_i2cmux_idle: pinmux-i2cmux-idle {
+ state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
pta {
nvidia,pins = "pta";
- nvidia,function = "rsvd4";
+ nvidia,function = "i2c2";
};
};
};
#address-cells = <1>;
#size-cells = <0>;
- lpddr2 {
- compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
- revision-id = <1 0>;
- density = <2048>;
- io-width = <16>;
- };
-
emc-table@25000 {
reg = <25000>;
compatible = "nvidia,tegra20-emc-table";
0x007e0010 0x00000000 0x00000000 0x0000001b
0x00000000 0x00000000 0x00000000 0x00000000>;
};
+
+ lpddr2 {
+ compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
+ revision-id = <1 0>;
+ density = <2048>;
+ io-width = <16>;
+ };
};
};
};
};
- gpio-keys {
- compatible = "gpio-keys";
-
- switch-dock-hall-sensor {
- label = "Lid";
- gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>;
- linux,input-type = <EV_SW>;
- linux,code = <SW_LID>;
- debounce-interval = <500>;
- wakeup-event-action = <EV_ACT_ASSERTED>;
- wakeup-source;
- };
-
- key-power {
- label = "Power";
- gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_POWER>;
- debounce-interval = <10>;
- wakeup-event-action = <EV_ACT_ASSERTED>;
- wakeup-source;
- };
-
- key-volume-up {
- label = "Volume Up";
- gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
- debounce-interval = <10>;
- wakeup-event-action = <EV_ACT_ASSERTED>;
- wakeup-source;
- };
-
- key-volume-down {
- label = "Volume Down";
- gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
- debounce-interval = <10>;
- wakeup-event-action = <EV_ACT_ASSERTED>;
- wakeup-source;
- };
- };
-
display-panel {
compatible = "auo,b101ew05", "panel-lvds";
};
};
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ key-power {
+ label = "Power";
+ gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ debounce-interval = <10>;
+ wakeup-event-action = <EV_ACT_ASSERTED>;
+ wakeup-source;
+ };
+
+ key-volume-down {
+ label = "Volume Down";
+ gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ debounce-interval = <10>;
+ wakeup-event-action = <EV_ACT_ASSERTED>;
+ wakeup-source;
+ };
+
+ key-volume-up {
+ label = "Volume Up";
+ gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ debounce-interval = <10>;
+ wakeup-event-action = <EV_ACT_ASSERTED>;
+ wakeup-source;
+ };
+
+ switch-dock-hall-sensor {
+ label = "Lid";
+ gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>;
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ debounce-interval = <500>;
+ wakeup-event-action = <EV_ACT_ASSERTED>;
+ wakeup-source;
+ };
+ };
+
i2cmux {
compatible = "i2c-mux-pinctrl";
#address-cells = <1>;
};
};
+ opp-table-emc {
+ /delete-node/ opp-666000000;
+ /delete-node/ opp-760000000;
+ };
+
vdd_5v0_sys: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
power-off-delay-us = <200>;
};
};
-
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-666000000;
- /delete-node/ opp-760000000;
-};
status = "okay";
};
+ /* SPI4: Colibri SSP */
+ spi@7000da00 {
+ status = "okay";
+ spi-max-frequency = <25000000>;
+
+ can@0 {
+ compatible = "microchip,mcp2515";
+ reg = <0>;
+ clocks = <&clk16m>;
+ interrupt-parent = <&gpio>;
+ /* CAN_INT */
+ interrupts = <TEGRA_GPIO(A, 0) IRQ_TYPE_EDGE_FALLING>;
+ spi-max-frequency = <10000000>;
+ vdd-supply = <®_3v3>;
+ xceiver-supply = <®_5v0>;
+ };
+ };
+
/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
usb@c5000000 {
status = "okay";
vbus-supply = <®_usbh_vbus>;
};
- /* SPI4: Colibri SSP */
- spi@7000da00 {
- status = "okay";
- spi-max-frequency = <25000000>;
-
- can@0 {
- compatible = "microchip,mcp2515";
- reg = <0>;
- clocks = <&clk16m>;
- interrupt-parent = <&gpio>;
- /* CAN_INT */
- interrupts = <TEGRA_GPIO(A, 0) IRQ_TYPE_EDGE_FALLING>;
- spi-max-frequency = <10000000>;
- vdd-supply = <®_3v3>;
- xceiver-supply = <®_5v0>;
- };
- };
-
/* SD/MMC */
mmc@c8000600 {
status = "okay";
pwms = <&pwm 0 5000000>; /* PWM<A> */
};
- clk16m: osc3 {
+ clk16m: clock-osc3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16000000>;
status = "okay";
};
+ /* SPI4: Colibri SSP */
+ spi@7000da00 {
+ status = "okay";
+ spi-max-frequency = <25000000>;
+ };
+
/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
usb@c5000000 {
status = "okay";
vbus-supply = <®_usbh_vbus>;
};
- /* SPI4: Colibri SSP */
- spi@7000da00 {
- status = "okay";
- spi-max-frequency = <25000000>;
- };
-
/* SD/MMC */
mmc@c8000600 {
status = "okay";
};
};
+ gpio@6000d000 {
+ lan-reset-n-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(V, 4) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LAN_RESET#";
+ };
+
+ /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
+ npwe-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "Tri-state nPWE";
+ };
+
+ /* Not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR */
+ rdnwr-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(T, 6) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "Not tri-state RDnWR";
+ };
+ };
+
pinmux@70000014 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
vbus-supply = <®_lan_v_bus>;
};
- clk32k_in: xtal3 {
+ clk32k_in: clock-xtal3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
+ opp-table-emc {
+ /delete-node/ opp-760000000;
+ };
+
reg_lan_v_bus: regulator-lan-v-bus {
compatible = "regulator-fixed";
regulator-name = "LAN_V_BUS";
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
-
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-760000000;
-};
-
-&gpio {
- lan-reset-n-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(V, 4) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "LAN_RESET#";
- };
-
- /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
- npwe-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "Tri-state nPWE";
- };
-
- /* Not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR */
- rdnwr-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(T, 6) GPIO_ACTIVE_HIGH>;
- output-low;
- line-name = "Not tri-state RDnWR";
- };
-};
stdout-path = "serial0:115200n8";
};
- pwm@7000a000 {
- status = "okay";
- };
-
host1x@50000000 {
dc@54200000 {
rgb {
};
};
+ pwm@7000a000 {
+ status = "okay";
+ };
+
i2c@7000c000 {
wm8903: wm8903@1a {
compatible = "wlf,wm8903";
reset-names = "i2c";
};
- memory-controller@7000f400 {
- nvidia,use-ram-code;
-
- emc-tables@0 {
- nvidia,ram-code = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- emc-table@166500 {
- reg = <166500>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <166500>;
- nvidia,emc-registers = <0x0000000a 0x00000016
- 0x00000008 0x00000003 0x00000004 0x00000004
- 0x00000002 0x0000000c 0x00000003 0x00000003
- 0x00000002 0x00000001 0x00000004 0x00000005
- 0x00000004 0x00000009 0x0000000d 0x000004df
- 0x00000000 0x00000003 0x00000003 0x00000003
- 0x00000003 0x00000001 0x0000000a 0x000000c8
- 0x00000003 0x00000006 0x00000004 0x00000008
- 0x00000002 0x00000000 0x00000000 0x00000002
- 0x00000000 0x00000000 0x00000083 0xe03b0323
- 0x007fe010 0x00001414 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
-
- emc-table@333000 {
- reg = <333000>;
- compatible = "nvidia,tegra20-emc-table";
- clock-frequency = <333000>;
- nvidia,emc-registers = <0x00000018 0x00000033
- 0x00000012 0x00000004 0x00000004 0x00000005
- 0x00000003 0x0000000c 0x00000006 0x00000006
- 0x00000003 0x00000001 0x00000004 0x00000005
- 0x00000004 0x00000009 0x0000000d 0x00000bff
- 0x00000000 0x00000003 0x00000003 0x00000006
- 0x00000006 0x00000001 0x00000011 0x000000c8
- 0x00000003 0x0000000e 0x00000007 0x00000008
- 0x00000002 0x00000000 0x00000000 0x00000002
- 0x00000000 0x00000000 0x00000083 0xf0440303
- 0x007fe010 0x00001414 0x00000000 0x00000000
- 0x00000000 0x00000000 0x00000000 0x00000000>;
- };
- };
- };
-
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
core-supply = <&core_vdd_reg>;
};
+ memory-controller@7000f400 {
+ nvidia,use-ram-code;
+
+ emc-tables@0 {
+ nvidia,ram-code = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ emc-table@166500 {
+ reg = <166500>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <166500>;
+ nvidia,emc-registers = <0x0000000a 0x00000016
+ 0x00000008 0x00000003 0x00000004 0x00000004
+ 0x00000002 0x0000000c 0x00000003 0x00000003
+ 0x00000002 0x00000001 0x00000004 0x00000005
+ 0x00000004 0x00000009 0x0000000d 0x000004df
+ 0x00000000 0x00000003 0x00000003 0x00000003
+ 0x00000003 0x00000001 0x0000000a 0x000000c8
+ 0x00000003 0x00000006 0x00000004 0x00000008
+ 0x00000002 0x00000000 0x00000000 0x00000002
+ 0x00000000 0x00000000 0x00000083 0xe03b0323
+ 0x007fe010 0x00001414 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+
+ emc-table@333000 {
+ reg = <333000>;
+ compatible = "nvidia,tegra20-emc-table";
+ clock-frequency = <333000>;
+ nvidia,emc-registers = <0x00000018 0x00000033
+ 0x00000012 0x00000004 0x00000004 0x00000005
+ 0x00000003 0x0000000c 0x00000006 0x00000006
+ 0x00000003 0x00000001 0x00000004 0x00000005
+ 0x00000004 0x00000009 0x0000000d 0x00000bff
+ 0x00000000 0x00000003 0x00000003 0x00000006
+ 0x00000006 0x00000001 0x00000011 0x000000c8
+ 0x00000003 0x0000000e 0x00000007 0x00000008
+ 0x00000002 0x00000000 0x00000000 0x00000002
+ 0x00000000 0x00000000 0x00000083 0xf0440303
+ 0x007fe010 0x00001414 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000>;
+ };
+ };
+ };
+
usb@c5000000 {
compatible = "nvidia,tegra20-udc";
status = "okay";
#clock-cells = <0>;
};
+ cpus {
+ cpu0: cpu@0 {
+ cpu-supply = <&cpu_vdd_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
+ };
+
+ cpu1: cpu@1 {
+ cpu-supply = <&cpu_vdd_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
};
};
+ opp-table-emc {
+ /delete-node/ opp-760000000;
+ };
+
panel: panel {
compatible = "samsung,ltn101nt05";
clock-names = "pll_a", "pll_a_out0", "mclk";
};
- cpus {
- cpu0: cpu@0 {
- cpu-supply = <&cpu_vdd_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- cpu-supply = <&cpu_vdd_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- #cooling-cells = <2>;
- };
- };
-
thermal-zones {
cpu-thermal {
polling-delay-passive = <500>; /* milliseconds */
};
};
};
-
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-760000000;
-};
};
};
- state_i2cmux_pta: pinmux-i2cmux-pta {
+ state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
pta {
nvidia,pins = "pta";
- nvidia,function = "i2c2";
+ nvidia,function = "rsvd4";
};
};
- state_i2cmux_idle: pinmux-i2cmux-idle {
+ state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
pta {
nvidia,pins = "pta";
- nvidia,function = "rsvd4";
+ nvidia,function = "i2c2";
};
};
};
clock-frequency = <100000>;
};
- i2cmux {
- compatible = "i2c-mux-pinctrl";
- #address-cells = <1>;
- #size-cells = <0>;
-
- i2c-parent = <&{/i2c@7000c400}>;
-
- pinctrl-names = "ddc", "pta", "idle";
- pinctrl-0 = <&state_i2cmux_ddc>;
- pinctrl-1 = <&state_i2cmux_pta>;
- pinctrl-2 = <&state_i2cmux_idle>;
-
- hdmi_ddc: i2c@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- lvds_ddc: i2c@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- smart-battery@b {
- compatible = "ti,bq20z75", "sbs,sbs-battery";
- reg = <0xb>;
- sbs,i2c-retry-count = <2>;
- sbs,poll-retry-count = <10>;
- };
- };
- };
-
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
};
};
+ i2cmux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-parent = <&{/i2c@7000c400}>;
+
+ pinctrl-names = "ddc", "pta", "idle";
+ pinctrl-0 = <&state_i2cmux_ddc>;
+ pinctrl-1 = <&state_i2cmux_pta>;
+ pinctrl-2 = <&state_i2cmux_idle>;
+
+ hdmi_ddc: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ lvds_ddc: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ smart-battery@b {
+ compatible = "ti,bq20z75", "sbs,sbs-battery";
+ reg = <0xb>;
+ sbs,i2c-retry-count = <2>;
+ sbs,poll-retry-count = <10>;
+ };
+ };
+ };
+
panel: panel {
compatible = "chunghwa,claa101wa01a";
};
};
- state_i2cmux_pta: pinmux-i2cmux-pta {
+ state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
pta {
nvidia,pins = "pta";
- nvidia,function = "i2c2";
+ nvidia,function = "rsvd4";
};
};
- state_i2cmux_idle: pinmux-i2cmux-idle {
+ state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
pta {
nvidia,pins = "pta";
- nvidia,function = "rsvd4";
+ nvidia,function = "i2c2";
};
};
};
status = "okay";
};
- i2cmux {
- compatible = "i2c-mux-pinctrl";
- #address-cells = <1>;
- #size-cells = <0>;
-
- i2c-parent = <&{/i2c@7000c400}>;
-
- pinctrl-names = "ddc", "pta", "idle";
- pinctrl-0 = <&state_i2cmux_ddc>;
- pinctrl-1 = <&state_i2cmux_pta>;
- pinctrl-2 = <&state_i2cmux_idle>;
-
- hdmi_ddc: i2c@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- i2c@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
i2c@7000d000 {
clock-frequency = <400000>;
status = "okay";
#clock-cells = <0>;
};
+ i2cmux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-parent = <&{/i2c@7000c400}>;
+
+ pinctrl-names = "ddc", "pta", "idle";
+ pinctrl-0 = <&state_i2cmux_ddc>;
+ pinctrl-1 = <&state_i2cmux_pta>;
+ pinctrl-2 = <&state_i2cmux_idle>;
+
+ hdmi_ddc: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
pci_vdd_reg: regulator-1v05 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v05";
#clock-cells = <0>;
};
+ cpus {
+ cpu0: cpu@0 {
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+
+ cpu@1 {
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
<&tegra_car TEGRA20_CLK_CDEV1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
-
- cpus {
- cpu0: cpu@0 {
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@1 {
- operating-points-v2 = <&cpu0_opp_table>;
- };
- };
};
};
};
- state_i2cmux_pta: pinmux-i2cmux-pta {
+ state_i2cmux_idle: pinmux-i2cmux-idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
pta {
nvidia,pins = "pta";
- nvidia,function = "i2c2";
+ nvidia,function = "rsvd4";
};
};
- state_i2cmux_idle: pinmux-i2cmux-idle {
+ state_i2cmux_pta: pinmux-i2cmux-pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
pta {
nvidia,pins = "pta";
- nvidia,function = "rsvd4";
+ nvidia,function = "i2c2";
};
};
};
clock-frequency = <100000>;
};
- i2cmux {
- compatible = "i2c-mux-pinctrl";
- #address-cells = <1>;
- #size-cells = <0>;
-
- i2c-parent = <&{/i2c@7000c400}>;
-
- pinctrl-names = "ddc", "pta", "idle";
- pinctrl-0 = <&state_i2cmux_ddc>;
- pinctrl-1 = <&state_i2cmux_pta>;
- pinctrl-2 = <&state_i2cmux_idle>;
-
- hdmi_ddc: i2c@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- lvds_ddc: i2c@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
};
};
+ i2cmux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-parent = <&{/i2c@7000c400}>;
+
+ pinctrl-names = "ddc", "pta", "idle";
+ pinctrl-0 = <&state_i2cmux_ddc>;
+ pinctrl-1 = <&state_i2cmux_pta>;
+ pinctrl-2 = <&state_i2cmux_idle>;
+
+ hdmi_ddc: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ lvds_ddc: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
panel: panel {
compatible = "chunghwa,claa101wa01a";
operating-points-v2 = <&vde_dvfs_opp_table>;
};
- apbmisc@70000800 {
- compatible = "nvidia,tegra20-apbmisc";
- reg = <0x70000800 0x64>, /* Chip revision */
- <0x70000008 0x04>; /* Strapping options */
- };
-
pinmux: pinmux@70000014 {
compatible = "nvidia,tegra20-pinmux";
reg = <0x70000014 0x10>, /* Tri-state registers */
<0x70000868 0xa8>; /* Pad control registers */
};
+ apbmisc@70000800 {
+ compatible = "nvidia,tegra20-apbmisc";
+ reg = <0x70000800 0x64>, /* Chip revision */
+ <0x70000008 0x04>; /* Strapping options */
+ };
+
das@70000c00 {
compatible = "nvidia,tegra20-das";
reg = <0x70000c00 0x80>;
status = "disabled";
};
- rtc@7000e000 {
- compatible = "nvidia,tegra20-rtc";
- reg = <0x7000e000 0x100>;
- interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA20_CLK_RTC>;
- };
-
i2c@7000c000 {
compatible = "nvidia,tegra20-i2c";
reg = <0x7000c000 0x100>;
status = "disabled";
};
+ rtc@7000e000 {
+ compatible = "nvidia,tegra20-rtc";
+ reg = <0x7000e000 0x100>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA20_CLK_RTC>;
+ };
+
kbc@7000e200 {
compatible = "nvidia,tegra20-kbc";
reg = <0x7000e200 0x100>;
};
powergates {
+ pd_mpe: mpe {
+ clocks = <&tegra_car TEGRA20_CLK_MPE>;
+ resets = <&mc TEGRA20_MC_RESET_MPEA>,
+ <&mc TEGRA20_MC_RESET_MPEB>,
+ <&mc TEGRA20_MC_RESET_MPEC>,
+ <&tegra_car TEGRA20_CLK_MPE>;
+ power-domains = <&pd_core>;
+ #power-domain-cells = <0>;
+ };
+
pd_3d: td {
clocks = <&tegra_car TEGRA20_CLK_GR3D>;
resets = <&mc TEGRA20_MC_RESET_3D>,
#power-domain-cells = <0>;
};
+ pd_vde: vdec {
+ clocks = <&tegra_car TEGRA20_CLK_VDE>;
+ resets = <&mc TEGRA20_MC_RESET_VDE>,
+ <&tegra_car TEGRA20_CLK_VDE>;
+ power-domains = <&pd_core>;
+ #power-domain-cells = <0>;
+ };
+
pd_venc: venc {
clocks = <&tegra_car TEGRA20_CLK_ISP>,
<&tegra_car TEGRA20_CLK_VI>,
power-domains = <&pd_core>;
#power-domain-cells = <0>;
};
-
- pd_vde: vdec {
- clocks = <&tegra_car TEGRA20_CLK_VDE>;
- resets = <&mc TEGRA20_MC_RESET_VDE>,
- <&tegra_car TEGRA20_CLK_VDE>;
- power-domains = <&pd_core>;
- #power-domain-cells = <0>;
- };
-
- pd_mpe: mpe {
- clocks = <&tegra_car TEGRA20_CLK_MPE>;
- resets = <&mc TEGRA20_MC_RESET_MPEA>,
- <&mc TEGRA20_MC_RESET_MPEB>,
- <&mc TEGRA20_MC_RESET_MPEC>,
- <&tegra_car TEGRA20_CLK_MPE>;
- power-domains = <&pd_core>;
- #power-domain-cells = <0>;
- };
};
};
simple-audio-card,dai-link@0 {
reg = <0>;
- cpu {
- sound-dai = <&tegra_spdif>;
- };
-
codec {
sound-dai = <&tegra_hdmi>;
};
+
+ cpu {
+ sound-dai = <&tegra_spdif>;
+ };
};
};
};
};
};
+ gpio@6000d000 {
+ /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
+ pex-perst-n-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PEX_PERST_N";
+ };
+ };
+
/* Apalis UART1 */
serial@70006000 {
status = "okay";
vin-supply = <®_5v0>;
};
};
-
-&gpio {
- /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
- pex-perst-n-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "PEX_PERST_N";
- };
-};
};
};
+ gpio@6000d000 {
+ /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
+ pex-perst-n-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PEX_PERST_N";
+ };
+ };
+
/* Apalis UART1 */
serial@70006000 {
status = "okay";
vin-supply = <&vddio_sdmmc_1v8_reg>;
};
};
-
-&gpio {
- /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
- pex-perst-n-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "PEX_PERST_N";
- };
-};
/* ADC converstion time: 80 clocks */
st,sample-time = <4>;
+ stmpe_adc {
+ compatible = "st,stmpe-adc";
+ /* forbid to use ADC channels 3-0 (touch) */
+ st,norequest-mask = <0x0F>;
+ };
+
stmpe_touchscreen {
compatible = "st,stmpe-ts";
/* 8 sample average control */
/* 5 ms touch detect interrupt delay */
st,touch-det-delay = <5>;
};
-
- stmpe_adc {
- compatible = "st,stmpe-adc";
- /* forbid to use ADC channels 3-0 (touch) */
- st,norequest-mask = <0x0F>;
- };
};
/*
mmc-ddr-1_8v;
};
- clk32k_in: xtal1 {
+ clk16m: clock-osc4 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <32768>;
+ clock-frequency = <16000000>;
};
- clk16m: osc4 {
+ clk32k_in: clock-xtal1 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <16000000>;
+ clock-frequency = <32768>;
};
reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {
/* ADC converstion time: 80 clocks */
st,sample-time = <4>;
+ stmpe_adc {
+ compatible = "st,stmpe-adc";
+ /* forbid to use ADC channels 3-0 (touch) */
+ st,norequest-mask = <0x0F>;
+ };
+
stmpe_touchscreen {
compatible = "st,stmpe-ts";
/* 8 sample average control */
/* 5 ms touch detect interrupt delay */
st,touch-det-delay = <5>;
};
-
- stmpe_adc {
- compatible = "st,stmpe-adc";
- /* forbid to use ADC channels 3-0 (touch) */
- st,norequest-mask = <0x0F>;
- };
};
/*
mmc-ddr-1_8v;
};
- clk32k_in: xtal1 {
+ clk16m: clock-osc4 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <32768>;
+ clock-frequency = <16000000>;
};
- clk16m: osc4 {
+ clk32k_in: clock-xtal1 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <16000000>;
+ clock-frequency = <32768>;
};
reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {
/* This dtsi file describes parts common for Asus T30 devices with a LVDS panel. */
+#include <dt-bindings/gpio/tegra-gpio.h>
+
/ {
host1x@50000000 {
lcd: dc@54200000 {
*/
chosen {};
+ firmware {
+ trusted-foundations {
+ compatible = "tlm,trusted-foundations";
+ tlm,version-major = <0x0>;
+ tlm,version-minor = <0x0>;
+ };
+ };
+
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
};
gpio@6000d000 {
+ init-low-power-mode-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+
init-mode-hog {
gpio-hog;
gpios = <TEGRA_GPIO(DD, 7) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
output-low;
};
-
- init-low-power-mode-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
- input;
- };
};
pinmux@70000868 {
};
};
- brcm_wifi_pwrseq: wifi-pwrseq {
- compatible = "mmc-pwrseq-simple";
-
- clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
- clock-names = "ext_clock";
-
- reset-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_LOW>;
- post-power-on-delay-ms = <300>;
- power-off-delay-us = <300>;
- };
-
sdmmc3: mmc@78000400 {
status = "okay";
/delete-property/ ddc-i2c-bus;
};
- firmware {
- trusted-foundations {
- compatible = "tlm,trusted-foundations";
- tlm,version-major = <0x0>;
- tlm,version-minor = <0x0>;
- };
- };
-
gpio-keys {
compatible = "gpio-keys";
- switch-hall-sensor {
- label = "Lid";
- gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>;
- linux,input-type = <EV_SW>;
- linux,code = <SW_LID>;
- debounce-interval = <500>;
- wakeup-event-action = <EV_ACT_DEASSERTED>;
- wakeup-source;
- };
-
key-power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
wakeup-source;
};
+ key-volume-down {
+ label = "Volume Down";
+ gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ debounce-interval = <10>;
+ wakeup-event-action = <EV_ACT_ASSERTED>;
+ wakeup-source;
+ };
+
key-volume-up {
label = "Volume Up";
gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
wakeup-source;
};
- key-volume-down {
- label = "Volume Down";
- gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
- debounce-interval = <10>;
- wakeup-event-action = <EV_ACT_ASSERTED>;
+ switch-hall-sensor {
+ label = "Lid";
+ gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>;
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ debounce-interval = <500>;
+ wakeup-event-action = <EV_ACT_DEASSERTED>;
wakeup-source;
};
};
+ brcm_wifi_pwrseq: pwrseq-wifi {
+ compatible = "mmc-pwrseq-simple";
+
+ clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
+ clock-names = "ext_clock";
+
+ reset-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <300>;
+ power-off-delay-us = <300>;
+ };
+
vdd_5v0_sys: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
- max77620_default: pinmux {
- gpio4 {
- pins = "gpio4";
- function = "32k-out1";
- };
- };
-
cpu-pwr-req-hog {
gpio-hog;
gpios = <6 GPIO_ACTIVE_HIGH>;
};
};
+ max77620_default: pinmux {
+ gpio4 {
+ pins = "gpio4";
+ function = "32k-out1";
+ };
+ };
+
regulators {
in-sd0-supply = <&vdd_5v0_sys>;
in-sd1-supply = <&vdd_5v0_sys>;
};
};
};
-};
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-750000000-1300;
- /delete-node/ opp-800000000-1300;
- /delete-node/ opp-900000000-1350;
-};
+ opp-table-actmon {
+ /delete-node/ opp-750000000;
+ /delete-node/ opp-800000000;
+ /delete-node/ opp-900000000;
+ };
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-750000000;
- /delete-node/ opp-800000000;
- /delete-node/ opp-900000000;
+ opp-table-emc {
+ /delete-node/ opp-750000000-1300;
+ /delete-node/ opp-800000000-1300;
+ /delete-node/ opp-900000000-1350;
+ };
};
/ {
compatible = "asus,grouper", "nvidia,tegra30";
- display-panel {
- panel-timing {
- clock-frequency = <68000000>;
- hactive = <800>;
- vactive = <1280>;
- hfront-porch = <24>;
- hback-porch = <32>;
- hsync-len = <24>;
- vsync-len = <1>;
- vfront-porch = <5>;
- vback-porch = <32>;
- };
- };
-
pinmux@70000868 {
state_default: pinmux {
lcd_dc1_pd2 {
firmware-gpios = <&gpio TEGRA_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
};
};
+
+ display-panel {
+ panel-timing {
+ clock-frequency = <68000000>;
+ hactive = <800>;
+ vactive = <1280>;
+ hfront-porch = <24>;
+ hback-porch = <32>;
+ hsync-len = <24>;
+ vsync-len = <1>;
+ vfront-porch = <5>;
+ vback-porch = <32>;
+ };
+ };
};
/ {
compatible = "asus,tilapia", "asus,grouper", "nvidia,tegra30";
- display-panel {
- enable-gpios = <&gpio TEGRA_GPIO(V, 6) GPIO_ACTIVE_HIGH>;
-
- panel-timing {
- clock-frequency = <81750000>;
- hactive = <800>;
- vactive = <1280>;
- hfront-porch = <64>;
- hback-porch = <128>;
- hsync-len = <64>;
- vsync-len = <1>;
- vfront-porch = <5>;
- vback-porch = <2>;
- };
- };
-
gpio@6000d000 {
init-mode-3g-hog {
gpio-hog;
firmware-gpios = <&gpio TEGRA_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
};
};
+
+ display-panel {
+ enable-gpios = <&gpio TEGRA_GPIO(V, 6) GPIO_ACTIVE_HIGH>;
+
+ panel-timing {
+ clock-frequency = <81750000>;
+ hactive = <800>;
+ vactive = <1280>;
+ hfront-porch = <64>;
+ hback-porch = <128>;
+ hsync-len = <64>;
+ vsync-len = <1>;
+ vfront-porch = <5>;
+ vback-porch = <2>;
+ };
+ };
};
enable-gpios = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
vcc-supply = <&vdd_3v3_sys>;
};
-};
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-533000000-1200;
- /delete-node/ opp-625000000-1200;
- /delete-node/ opp-625000000-1250;
- /delete-node/ opp-667000000-1200;
- /delete-node/ opp-750000000-1300;
- /delete-node/ opp-800000000-1300;
- /delete-node/ opp-900000000-1350;
-};
+ opp-table-actmon {
+ /delete-node/ opp-533000000;
+ /delete-node/ opp-625000000;
+ /delete-node/ opp-667000000;
+ /delete-node/ opp-750000000;
+ /delete-node/ opp-800000000;
+ /delete-node/ opp-900000000;
+ };
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-533000000;
- /delete-node/ opp-625000000;
- /delete-node/ opp-667000000;
- /delete-node/ opp-750000000;
- /delete-node/ opp-800000000;
- /delete-node/ opp-900000000;
+ opp-table-emc {
+ /delete-node/ opp-533000000-1200;
+ /delete-node/ opp-625000000-1200;
+ /delete-node/ opp-625000000-1250;
+ /delete-node/ opp-667000000-1200;
+ /delete-node/ opp-750000000-1300;
+ /delete-node/ opp-800000000-1300;
+ /delete-node/ opp-900000000-1350;
+ };
};
compatible = "innolux,g101ice-l01";
};
+ opp-table-emc {
+ /delete-node/ opp-750000000-1300;
+ /delete-node/ opp-800000000-1300;
+ /delete-node/ opp-900000000-1350;
+ };
+
+ opp-table-actmon {
+ /delete-node/ opp-750000000;
+ /delete-node/ opp-800000000;
+ /delete-node/ opp-900000000;
+ };
+
sound {
compatible = "asus,tegra-audio-wm8903-tf300t",
"nvidia,tegra-audio-wm8903";
nvidia,headset;
};
};
-
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-750000000-1300;
- /delete-node/ opp-800000000-1300;
- /delete-node/ opp-900000000-1350;
-};
-
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-750000000;
- /delete-node/ opp-800000000;
- /delete-node/ opp-900000000;
-};
display-panel {
compatible = "innolux,g101ice-l01";
};
-};
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-750000000-1300;
- /delete-node/ opp-800000000-1300;
- /delete-node/ opp-900000000-1350;
-};
+ opp-table-emc {
+ /delete-node/ opp-750000000-1300;
+ /delete-node/ opp-800000000-1300;
+ /delete-node/ opp-900000000-1350;
+ };
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-750000000;
- /delete-node/ opp-800000000;
- /delete-node/ opp-900000000;
+ opp-table-actmon {
+ /delete-node/ opp-750000000;
+ /delete-node/ opp-800000000;
+ /delete-node/ opp-900000000;
+ };
};
vddio-supply = <&vdd_1v8_vio>;
vddmipi-supply = <&vdd_1v2_mipi>;
+ /*
+ * Panasonic VVX10F004B00 or HYDIS HV101WU1-1E1
+ * LCD SuperIPS+ Full HD panel.
+ */
+ panel@1 {
+ compatible = "panasonic,vvx10f004b00";
+ reg = <1>;
+
+ power-supply = <&vdd_pnl>;
+ backlight = <&backlight>;
+
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&bridge_output>;
+ };
+ };
+ };
+
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
-
- /*
- * Panasonic VVX10F004B00 or HYDIS HV101WU1-1E1
- * LCD SuperIPS+ Full HD panel.
- */
- panel@1 {
- compatible = "panasonic,vvx10f004b00";
- reg = <1>;
-
- power-supply = <&vdd_pnl>;
- backlight = <&backlight>;
-
- port {
- panel_input: endpoint {
- remote-endpoint = <&bridge_output>;
- };
- };
- };
};
};
};
+ opp-table-actmon {
+ /delete-node/ opp-900000000;
+ };
+
+ opp-table-emc {
+ /delete-node/ opp-900000000-1350;
+ };
+
vdd_1v2_mipi: regulator-mipi {
compatible = "regulator-fixed";
regulator-name = "tc358768_1v2_vdd";
vin-supply = <&vdd_3v3_sys>;
};
};
-
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-900000000-1350;
-};
-
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-900000000;
-};
*/
chosen {};
+ firmware {
+ trusted-foundations {
+ compatible = "tlm,trusted-foundations";
+ tlm,version-major = <2>;
+ tlm,version-minor = <8>;
+ };
+ };
+
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
status = "okay";
clock-frequency = <400000>;
- nct72: temperature-sensor@4c {
- compatible = "onnn,nct1008";
- reg = <0x4c>;
-
- interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
-
- vcc-supply = <&vdd_3v3_sys>;
- #thermal-sensor-cells = <1>;
- };
-
/* Texas Instruments TPS659110 PMIC */
pmic: pmic@2d {
compatible = "ti,tps65911";
};
};
+ nct72: temperature-sensor@4c {
+ compatible = "onnn,nct1008";
+ reg = <0x4c>;
+
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
+
+ vcc-supply = <&vdd_3v3_sys>;
+ #thermal-sensor-cells = <1>;
+ };
+
vdd_core: core-regulator@60 {
compatible = "ti,tps62361";
reg = <0x60>;
};
};
- firmware {
- trusted-foundations {
- compatible = "tlm,trusted-foundations";
- tlm,version-major = <2>;
- tlm,version-minor = <8>;
- };
- };
-
gpio-keys {
compatible = "gpio-keys";
wakeup-source;
};
- key-volume-up {
- label = "Volume Up";
- gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
+ key-volume-down {
+ label = "Volume Down";
+ gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
- key-volume-down {
- label = "Volume Down";
- gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
+ key-volume-up {
+ label = "Volume Up";
+ gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
#clock-cells = <0>;
};
+ cpus {
+ cpu0: cpu@0 {
+ cpu-supply = <&vddctrl_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+
+ cpu@1 {
+ cpu-supply = <&vddctrl_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+
+ cpu@2 {
+ cpu-supply = <&vddctrl_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+
+ cpu@3 {
+ cpu-supply = <&vddctrl_reg>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+ };
+
gpio-leds {
compatible = "gpio-leds";
assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA30_CLK_EXTERN1>;
};
-
- cpus {
- cpu0: cpu@0 {
- cpu-supply = <&vddctrl_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@1 {
- cpu-supply = <&vddctrl_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@2 {
- cpu-supply = <&vddctrl_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
-
- cpu@3 {
- cpu-supply = <&vddctrl_reg>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
- };
};
};
};
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ key-power {
+ label = "Power";
+ interrupt-parent = <&pmic>;
+ interrupts = <2 0>;
+ linux,code = <KEY_POWER>;
+ debounce-interval = <100>;
+ wakeup-source;
+ };
+
+ key-volume-down {
+ label = "Volume Down";
+ gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ debounce-interval = <10>;
+ };
+
+ key-volume-up {
+ label = "Volume Up";
+ gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ debounce-interval = <10>;
+ };
+ };
+
panel: panel {
compatible = "chunghwa,claa101wb01";
ddc-i2c-bus = <&panelddc>;
};
};
};
-
- gpio-keys {
- compatible = "gpio-keys";
-
- key-power {
- label = "Power";
- interrupt-parent = <&pmic>;
- interrupts = <2 0>;
- linux,code = <KEY_POWER>;
- debounce-interval = <100>;
- wakeup-source;
- };
-
- key-volume-down {
- label = "Volume Down";
- gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
- debounce-interval = <10>;
- };
-
- key-volume-up {
- label = "Volume Up";
- gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
- debounce-interval = <10>;
- };
- };
};
pwms = <&pwm 0 5000000>; /* PWM<A> */
};
- clk16m: osc3 {
+ clk16m: clock-osc3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16000000>;
};
};
+ gpio: gpio@6000d000 {
+ lan-reset-n-hog {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LAN_RESET#";
+ };
+ };
+
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
st,sample-time = <4>;
/* forbid to use ADC channels 3-0 (touch) */
+ stmpe_adc {
+ compatible = "st,stmpe-adc";
+ st,norequest-mask = <0x0F>;
+ };
+
stmpe_touchscreen {
compatible = "st,stmpe-ts";
/* 8 sample average control */
/* 5 ms touch detect interrupt delay */
st,touch-det-delay = <5>;
};
-
- stmpe_adc {
- compatible = "st,stmpe-adc";
- st,norequest-mask = <0x0F>;
- };
};
/*
vbus-supply = <®_lan_v_bus>;
};
- clk32k_in: xtal1 {
+ clk32k_in: clock-xtal1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
<&tegra_car TEGRA30_CLK_EXTERN1>;
};
};
-
-&gpio {
- lan-reset-n-hog {
- gpio-hog;
- gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "LAN_RESET#";
- };
-};
stdout-path = "serial0:115200n8";
};
+ firmware {
+ trusted-foundations {
+ compatible = "tlm,trusted-foundations";
+ tlm,version-major = <0x0>;
+ tlm,version-minor = <0x0>;
+ };
+ };
+
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
status = "okay";
clock-frequency = <400000>;
- cpu_temp: nct1008@4c {
- compatible = "onnn,nct1008";
- reg = <0x4c>;
- vcc-supply = <&sys_3v3_reg>;
-
- interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
-
- #thermal-sensor-cells = <1>;
- };
-
pmic: pmic@2d {
compatible = "ti,tps65911";
reg = <0x2d>;
};
};
+ cpu_temp: nct1008@4c {
+ compatible = "onnn,nct1008";
+ reg = <0x4c>;
+ vcc-supply = <&sys_3v3_reg>;
+
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
+
+ #thermal-sensor-cells = <1>;
+ };
+
vdd_core: tps62361@60 {
compatible = "ti,tps62361";
reg = <0x60>;
status = "okay";
};
- wifi_pwrseq: wifi_pwrseq {
- compatible = "mmc-pwrseq-simple";
-
- clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
- clock-names = "ext_clock";
-
- reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>;
- post-power-on-delay-ms = <300>;
- power-off-delay-us = <300>;
- };
-
sdmmc3: mmc@78000400 {
status = "okay";
};
};
- firmware {
- trusted-foundations {
- compatible = "tlm,trusted-foundations";
- tlm,version-major = <0x0>;
- tlm,version-minor = <0x0>;
- };
- };
-
- fan: gpio_fan {
+ fan: fan {
compatible = "gpio-fan";
gpios = <&gpio TEGRA_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
gpio-fan,speed-map = <0 0
#cooling-cells = <2>;
};
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay = <5000>;
- polling-delay-passive = <5000>;
+ gpio-keys {
+ compatible = "gpio-keys";
- thermal-sensors = <&cpu_temp 1>;
+ key-power {
+ gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
+ debounce-interval = <10>;
+ linux,code = <KEY_POWER>;
+ wakeup-event-action = <EV_ACT_ASSERTED>;
+ wakeup-source;
+ };
+ };
- trips {
- cpu_alert0: cpu-alert0 {
- temperature = <50000>;
- hysteresis = <10000>;
- type = "active";
- };
- cpu_alert1: cpu-alert1 {
- temperature = <70000>;
- hysteresis = <5000>;
- type = "passive";
- };
- cpu_crit: cpu-crit {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
+ leds {
+ compatible = "gpio-leds";
- cooling-maps {
- map0 {
- trip = <&cpu_alert0>;
- cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu_alert1>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&actmon THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>;
- };
- };
+ led-power {
+ label = "power-led";
+ gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ linux,default-trigger = "heartbeat";
+ retain-state-suspended;
};
};
- vdd_12v_in: vdd_12v_in {
+ opp-table-actmon {
+ /delete-node/ opp-900000000;
+ };
+
+ opp-table-emc {
+ /delete-node/ opp-900000000-1350;
+ };
+
+ wifi_pwrseq: pwrseq-wifi {
+ compatible = "mmc-pwrseq-simple";
+
+ clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
+ clock-names = "ext_clock";
+
+ reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <300>;
+ power-off-delay-us = <300>;
+ };
+
+ vdd_12v_in: regulator-vdd-12v-in {
compatible = "regulator-fixed";
regulator-name = "vdd_12v_in";
regulator-min-microvolt = <12000000>;
regulator-always-on;
};
- sdmmc_3v3_reg: sdmmc_3v3_reg {
+ sdmmc_3v3_reg: regulator-sdmmc-3v3 {
compatible = "regulator-fixed";
regulator-name = "sdmmc_3v3";
regulator-min-microvolt = <3300000>;
vin-supply = <&sys_3v3_reg>;
};
- vdd_fuse_3v3_reg: vdd_fuse_3v3_reg {
+ vdd_fuse_3v3_reg: regulator-vdd-fuse-3v3 {
compatible = "regulator-fixed";
regulator-name = "vdd_fuse_3v3";
regulator-min-microvolt = <3300000>;
regulator-always-on;
};
- vdd_vid_reg: vdd_vid_reg {
+ vdd_vid_reg: regulator-vdd-vid {
compatible = "regulator-fixed";
regulator-name = "vddio_vid";
regulator-min-microvolt = <5000000>;
regulator-boot-on;
};
- ddr_reg: ddr_reg {
+ ddr_reg: regulator-ddr {
compatible = "regulator-fixed";
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1500000>;
vin-supply = <&vdd_12v_in>;
};
- sys_3v3_reg: sys_3v3_reg {
+ sys_3v3_reg: regulator-sys-3v3 {
compatible = "regulator-fixed";
regulator-name = "sys_3v3";
regulator-min-microvolt = <3300000>;
vin-supply = <&vdd_12v_in>;
};
- vdd_5v0_reg: vdd_5v0_reg {
+ vdd_5v0_reg: regulator-vdd-5v0 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
vin-supply = <&vdd_12v_in>;
};
- vdd_smsc: vdd_smsc {
+ vdd_smsc: regulator-vdd-smsc {
compatible = "regulator-fixed";
regulator-name = "vdd_smsc";
enable-active-high;
gpio = <&gpio TEGRA_GPIO(DD, 5) GPIO_ACTIVE_HIGH>;
};
- usb3_vbus_reg: usb3_vbus_reg {
+ usb3_vbus_reg: regulator-usb3-vbus {
compatible = "regulator-fixed";
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
vin-supply = <&vdd_5v0_reg>;
};
- gpio-keys {
- compatible = "gpio-keys";
-
- key-power {
- gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
- debounce-interval = <10>;
- linux,code = <KEY_POWER>;
- wakeup-event-action = <EV_ACT_ASSERTED>;
- wakeup-source;
- };
- };
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay = <5000>;
+ polling-delay-passive = <5000>;
+ thermal-sensors = <&cpu_temp 1>;
- leds {
- compatible = "gpio-leds";
+ trips {
+ cpu_alert0: cpu-alert0 {
+ temperature = <50000>;
+ hysteresis = <10000>;
+ type = "active";
+ };
+ cpu_alert1: cpu-alert1 {
+ temperature = <70000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ cpu_crit: cpu-crit {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
- led-power {
- label = "power-led";
- gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
- default-state = "on";
- linux,default-trigger = "heartbeat";
- retain-state-suspended;
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ map1 {
+ trip = <&cpu_alert1>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&actmon THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ };
+ };
};
};
};
-
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-900000000-1350;
-};
-
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-900000000;
-};
*/
chosen {};
+ firmware {
+ trusted-foundations {
+ compatible = "tlm,trusted-foundations";
+ tlm,version-major = <2>;
+ tlm,version-minor = <8>;
+ };
+ };
+
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
status = "okay";
clock-frequency = <400000>;
- light-sensor@44 {
- compatible = "isil,isl29023";
- reg = <0x44>;
-
- interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(Q, 3) IRQ_TYPE_LEVEL_HIGH>;
-
- vcc-supply = <&vdd_3v3_sen>;
- };
-
/* AsahiKASEI AK8975 magnetometer sensor */
magnetometer@c {
compatible = "asahi-kasei,ak8975";
"0", "0", "-1";
};
+ light-sensor@44 {
+ compatible = "isil,isl29023";
+ reg = <0x44>;
+
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(Q, 3) IRQ_TYPE_LEVEL_HIGH>;
+
+ vcc-supply = <&vdd_3v3_sen>;
+ };
+
gyroscope@68 {
compatible = "invensense,mpu3050";
reg = <0x68>;
status = "okay";
clock-frequency = <400000>;
- nct72: temperature-sensor@4c {
- compatible = "onnn,nct1008";
- reg = <0x4c>;
-
- interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(U, 5) IRQ_TYPE_EDGE_FALLING>;
-
- vcc-supply = <&vdd_3v3_sys>;
- #thermal-sensor-cells = <1>;
- };
-
/* Texas Instruments TPS659110 PMIC */
pmic: pmic@2d {
compatible = "ti,tps65911";
};
};
+ nct72: temperature-sensor@4c {
+ compatible = "onnn,nct1008";
+ reg = <0x4c>;
+
+ interrupt-parent = <&gpio>;
+ interrupts = <TEGRA_GPIO(U, 5) IRQ_TYPE_EDGE_FALLING>;
+
+ vcc-supply = <&vdd_3v3_sys>;
+ #thermal-sensor-cells = <1>;
+ };
+
vdd_core: core-regulator@60 {
compatible = "ti,tps62361";
reg = <0x60>;
vqmmc-supply = <&vddio_usd>; /* ldo3 */
};
- brcm_wifi_pwrseq: wifi-pwrseq {
- compatible = "mmc-pwrseq-simple";
-
- clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
- clock-names = "ext_clock";
-
- reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>;
- post-power-on-delay-ms = <300>;
- power-off-delay-us = <300>;
- };
-
sdmmc3: mmc@78000400 {
status = "okay";
};
};
- firmware {
- trusted-foundations {
- compatible = "tlm,trusted-foundations";
- tlm,version-major = <2>;
- tlm,version-minor = <8>;
- };
- };
-
gpio-keys {
compatible = "gpio-keys";
wakeup-source;
};
- key-volume-up {
- label = "Volume Up";
- gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
+ key-volume-down {
+ label = "Volume Down";
+ gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
};
- key-volume-down {
- label = "Volume Down";
- gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
+ key-volume-up {
+ label = "Volume Up";
+ gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
debounce-interval = <10>;
wakeup-event-action = <EV_ACT_ASSERTED>;
wakeup-source;
vcc-supply = <&vdd_3v3_sys>;
};
+ opp-table-actmon {
+ /delete-node/ opp-625000000;
+ /delete-node/ opp-667000000;
+ /delete-node/ opp-750000000;
+ /delete-node/ opp-800000000;
+ /delete-node/ opp-900000000;
+ };
+
+ opp-table-emc {
+ /delete-node/ opp-625000000-1200;
+ /delete-node/ opp-625000000-1250;
+ /delete-node/ opp-667000000-1200;
+ /delete-node/ opp-750000000-1300;
+ /delete-node/ opp-800000000-1300;
+ /delete-node/ opp-900000000-1350;
+ };
+
+ brcm_wifi_pwrseq: pwrseq-wifi {
+ compatible = "mmc-pwrseq-simple";
+
+ clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
+ clock-names = "ext_clock";
+
+ reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <300>;
+ power-off-delay-us = <300>;
+ };
+
sound {
compatible = "pegatron,tegra-audio-wm8903-chagall",
"nvidia,tegra-audio-wm8903";
};
};
};
-
-&emc_icc_dvfs_opp_table {
- /delete-node/ opp-625000000-1200;
- /delete-node/ opp-625000000-1250;
- /delete-node/ opp-667000000-1200;
- /delete-node/ opp-750000000-1300;
- /delete-node/ opp-800000000-1300;
- /delete-node/ opp-900000000-1350;
-};
-
-&emc_bw_dfs_opp_table {
- /delete-node/ opp-625000000;
- /delete-node/ opp-667000000;
- /delete-node/ opp-750000000;
- /delete-node/ opp-800000000;
- /delete-node/ opp-900000000;
-};
#clock-cells = <1>;
#reset-cells = <1>;
- sclk {
- compatible = "nvidia,tegra30-sclk";
- clocks = <&tegra_car TEGRA30_CLK_SCLK>;
- power-domains = <&pd_core>;
- operating-points-v2 = <&sclk_dvfs_opp_table>;
- };
-
pll-c {
compatible = "nvidia,tegra30-pllc";
clocks = <&tegra_car TEGRA30_CLK_PLL_C>;
power-domains = <&pd_core>;
operating-points-v2 = <&pll_m_dvfs_opp_table>;
};
+
+ sclk {
+ compatible = "nvidia,tegra30-sclk";
+ clocks = <&tegra_car TEGRA30_CLK_SCLK>;
+ power-domains = <&pd_core>;
+ operating-points-v2 = <&sclk_dvfs_opp_table>;
+ };
};
flow-controller@60007000 {
status = "disabled";
};
- rtc@7000e000 {
- compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc";
- reg = <0x7000e000 0x100>;
- interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA30_CLK_RTC>;
- };
-
i2c@7000c000 {
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
reg = <0x7000c000 0x100>;
status = "disabled";
};
+ rtc@7000e000 {
+ compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc";
+ reg = <0x7000e000 0x100>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA30_CLK_RTC>;
+ };
+
kbc@7000e200 {
compatible = "nvidia,tegra30-kbc", "nvidia,tegra20-kbc";
reg = <0x7000e200 0x100>;
};
powergates {
+ pd_heg: heg {
+ clocks = <&tegra_car TEGRA30_CLK_GR2D>,
+ <&tegra_car TEGRA30_CLK_EPP>,
+ <&tegra_car TEGRA30_CLK_HOST1X>;
+ resets = <&mc TEGRA30_MC_RESET_2D>,
+ <&mc TEGRA30_MC_RESET_EPP>,
+ <&mc TEGRA30_MC_RESET_HC>,
+ <&tegra_car TEGRA30_CLK_GR2D>,
+ <&tegra_car TEGRA30_CLK_EPP>,
+ <&tegra_car TEGRA30_CLK_HOST1X>;
+ power-domains = <&pd_core>;
+ #power-domain-cells = <0>;
+ };
+
+ pd_mpe: mpe {
+ clocks = <&tegra_car TEGRA30_CLK_MPE>;
+ resets = <&mc TEGRA30_MC_RESET_MPE>,
+ <&tegra_car TEGRA30_CLK_MPE>;
+ power-domains = <&pd_core>;
+ #power-domain-cells = <0>;
+ };
+
pd_3d0: td {
clocks = <&tegra_car TEGRA30_CLK_GR3D>;
resets = <&mc TEGRA30_MC_RESET_3D>,
#power-domain-cells = <0>;
};
+ pd_vde: vdec {
+ clocks = <&tegra_car TEGRA30_CLK_VDE>;
+ resets = <&mc TEGRA30_MC_RESET_VDE>,
+ <&tegra_car TEGRA30_CLK_VDE>;
+ power-domains = <&pd_core>;
+ #power-domain-cells = <0>;
+ };
+
pd_venc: venc {
clocks = <&tegra_car TEGRA30_CLK_ISP>,
<&tegra_car TEGRA30_CLK_VI>,
power-domains = <&pd_core>;
#power-domain-cells = <0>;
};
-
- pd_vde: vdec {
- clocks = <&tegra_car TEGRA30_CLK_VDE>;
- resets = <&mc TEGRA30_MC_RESET_VDE>,
- <&tegra_car TEGRA30_CLK_VDE>;
- power-domains = <&pd_core>;
- #power-domain-cells = <0>;
- };
-
- pd_mpe: mpe {
- clocks = <&tegra_car TEGRA30_CLK_MPE>;
- resets = <&mc TEGRA30_MC_RESET_MPE>,
- <&tegra_car TEGRA30_CLK_MPE>;
- power-domains = <&pd_core>;
- #power-domain-cells = <0>;
- };
-
- pd_heg: heg {
- clocks = <&tegra_car TEGRA30_CLK_GR2D>,
- <&tegra_car TEGRA30_CLK_EPP>,
- <&tegra_car TEGRA30_CLK_HOST1X>;
- resets = <&mc TEGRA30_MC_RESET_2D>,
- <&mc TEGRA30_MC_RESET_EPP>,
- <&mc TEGRA30_MC_RESET_HC>,
- <&tegra_car TEGRA30_CLK_GR2D>,
- <&tegra_car TEGRA30_CLK_EPP>,
- <&tegra_car TEGRA30_CLK_HOST1X>;
- power-domains = <&pd_core>;
- #power-domain-cells = <0>;
- };
};
};
projects / linux-2.6-block.git / commitdiff