[PATCH] genirq: rename desc->handler to desc->chip
authorIngo Molnar <mingo@elte.hu>
Thu, 29 Jun 2006 09:24:36 +0000 (02:24 -0700)
committerLinus Torvalds <torvalds@g5.osdl.org>
Thu, 29 Jun 2006 17:26:21 +0000 (10:26 -0700)
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.

While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.

The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.

This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.

As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.

The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.

We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.

This patch:

rename desc->handler to desc->chip.

Originally i did not want to do this, because it's a big patch.  But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.

I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.

So lets get over with this quickly.  The conversion was done automatically
via scripts and converts all the code in the kernel.

This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.

[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
151 files changed:
arch/alpha/kernel/irq.c
arch/alpha/kernel/irq_alpha.c
arch/alpha/kernel/irq_i8259.c
arch/alpha/kernel/irq_pyxis.c
arch/alpha/kernel/irq_srm.c
arch/alpha/kernel/sys_alcor.c
arch/alpha/kernel/sys_cabriolet.c
arch/alpha/kernel/sys_dp264.c
arch/alpha/kernel/sys_eb64p.c
arch/alpha/kernel/sys_eiger.c
arch/alpha/kernel/sys_jensen.c
arch/alpha/kernel/sys_marvel.c
arch/alpha/kernel/sys_mikasa.c
arch/alpha/kernel/sys_noritake.c
arch/alpha/kernel/sys_rawhide.c
arch/alpha/kernel/sys_rx164.c
arch/alpha/kernel/sys_sable.c
arch/alpha/kernel/sys_takara.c
arch/alpha/kernel/sys_titan.c
arch/alpha/kernel/sys_wildfire.c
arch/cris/arch-v10/kernel/irq.c
arch/cris/arch-v32/kernel/irq.c
arch/cris/kernel/irq.c
arch/i386/kernel/i8259.c
arch/i386/kernel/io_apic.c
arch/i386/kernel/irq.c
arch/i386/mach-visws/visws_apic.c
arch/i386/mach-voyager/voyager_smp.c
arch/ia64/kernel/iosapic.c
arch/ia64/kernel/irq.c
arch/ia64/kernel/irq_ia64.c
arch/ia64/kernel/smpboot.c
arch/ia64/sn/kernel/irq.c
arch/m32r/kernel/irq.c
arch/m32r/kernel/setup_m32104ut.c
arch/m32r/kernel/setup_m32700ut.c
arch/m32r/kernel/setup_mappi.c
arch/m32r/kernel/setup_mappi2.c
arch/m32r/kernel/setup_mappi3.c
arch/m32r/kernel/setup_oaks32r.c
arch/m32r/kernel/setup_opsput.c
arch/m32r/kernel/setup_usrv.c
arch/mips/au1000/common/irq.c
arch/mips/au1000/pb1200/irqmap.c
arch/mips/ddb5xxx/ddb5477/irq_5477.c
arch/mips/dec/ioasic-irq.c
arch/mips/dec/kn02-irq.c
arch/mips/gt64120/ev64120/irq.c
arch/mips/ite-boards/generic/irq.c
arch/mips/jazz/irq.c
arch/mips/jmr3927/rbhma3100/irq.c
arch/mips/kernel/i8259.c
arch/mips/kernel/irq-msc01.c
arch/mips/kernel/irq-mv6434x.c
arch/mips/kernel/irq-rm7000.c
arch/mips/kernel/irq-rm9000.c
arch/mips/kernel/irq.c
arch/mips/kernel/irq_cpu.c
arch/mips/lasat/interrupt.c
arch/mips/mips-boards/atlas/atlas_int.c
arch/mips/momentum/ocelot_c/cpci-irq.c
arch/mips/momentum/ocelot_c/uart-irq.c
arch/mips/philips/pnx8550/common/int.c
arch/mips/sgi-ip22/ip22-eisa.c
arch/mips/sgi-ip22/ip22-int.c
arch/mips/sgi-ip27/ip27-irq.c
arch/mips/sgi-ip32/ip32-irq.c
arch/mips/sibyte/bcm1480/irq.c
arch/mips/sibyte/sb1250/irq.c
arch/mips/sni/irq.c
arch/mips/tx4927/common/tx4927_irq.c
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
arch/mips/tx4938/common/irq.c
arch/mips/tx4938/toshiba_rbtx4938/irq.c
arch/mips/vr41xx/common/icu.c
arch/mips/vr41xx/common/irq.c
arch/mips/vr41xx/common/vrc4173.c
arch/mips/vr41xx/nec-cmbvr4133/irq.c
arch/parisc/kernel/irq.c
arch/powerpc/kernel/crash.c
arch/powerpc/kernel/irq.c
arch/powerpc/platforms/cell/interrupt.c
arch/powerpc/platforms/cell/spider-pic.c
arch/powerpc/platforms/iseries/irq.c
arch/powerpc/platforms/powermac/pic.c
arch/powerpc/platforms/pseries/xics.c
arch/powerpc/sysdev/i8259.c
arch/powerpc/sysdev/ipic.c
arch/powerpc/sysdev/mpic.c
arch/ppc/8xx_io/commproc.c
arch/ppc/platforms/apus_setup.c
arch/ppc/platforms/sbc82xx.c
arch/ppc/syslib/cpc700_pic.c
arch/ppc/syslib/cpm2_pic.c
arch/ppc/syslib/gt64260_pic.c
arch/ppc/syslib/m82xx_pci.c
arch/ppc/syslib/m8xx_setup.c
arch/ppc/syslib/mpc52xx_pic.c
arch/ppc/syslib/mv64360_pic.c
arch/ppc/syslib/open_pic.c
arch/ppc/syslib/open_pic2.c
arch/ppc/syslib/ppc403_pic.c
arch/ppc/syslib/ppc4xx_pic.c
arch/ppc/syslib/xilinx_pic.c
arch/sh/boards/adx/irq_maskreg.c
arch/sh/boards/bigsur/irq.c
arch/sh/boards/cqreek/irq.c
arch/sh/boards/dreamcast/setup.c
arch/sh/boards/ec3104/setup.c
arch/sh/boards/harp/irq.c
arch/sh/boards/mpc1211/setup.c
arch/sh/boards/overdrive/irq.c
arch/sh/boards/renesas/hs7751rvoip/irq.c
arch/sh/boards/renesas/rts7751r2d/irq.c
arch/sh/boards/renesas/systemh/irq.c
arch/sh/boards/se/73180/irq.c
arch/sh/boards/superh/microdev/irq.c
arch/sh/cchips/hd6446x/hd64461/setup.c
arch/sh/cchips/hd6446x/hd64465/setup.c
arch/sh/cchips/voyagergx/irq.c
arch/sh/kernel/cpu/irq/imask.c
arch/sh/kernel/cpu/irq/intc2.c
arch/sh/kernel/cpu/irq/ipr.c
arch/sh/kernel/cpu/irq/pint.c
arch/sh/kernel/irq.c
arch/sh64/kernel/irq.c
arch/sh64/kernel/irq_intc.c
arch/sh64/mach-cayman/irq.c
arch/sparc64/kernel/irq.c
arch/um/kernel/irq.c
arch/v850/kernel/irq.c
arch/x86_64/kernel/i8259.c
arch/x86_64/kernel/io_apic.c
arch/x86_64/kernel/irq.c
arch/xtensa/kernel/irq.c
drivers/char/vr41xx_giu.c
drivers/parisc/dino.c
drivers/parisc/eisa.c
drivers/parisc/gsc.c
drivers/parisc/iosapic.c
drivers/parisc/superio.c
drivers/pci/msi.c
drivers/pcmcia/hd64465_ss.c
include/asm-powerpc/hw_irq.h
include/linux/irq.h
kernel/irq/autoprobe.c
kernel/irq/handle.c
kernel/irq/manage.c
kernel/irq/migration.c
kernel/irq/proc.c
kernel/irq/spurious.c

index da677f829f7689966bf09aeda6d89fc4b6a876d1..ec9d243d42c9b37a3c9574f6aa2b9d036c1d4dfd 100644 (file)
@@ -49,7 +49,7 @@ select_smp_affinity(unsigned int irq)
        static int last_cpu;
        int cpu = last_cpu + 1;
 
-       if (!irq_desc[irq].handler->set_affinity || irq_user_affinity[irq])
+       if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq])
                return 1;
 
        while (!cpu_possible(cpu))
@@ -57,7 +57,7 @@ select_smp_affinity(unsigned int irq)
        last_cpu = cpu;
 
        irq_affinity[irq] = cpumask_of_cpu(cpu);
-       irq_desc[irq].handler->set_affinity(irq, cpumask_of_cpu(cpu));
+       irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu));
        return 0;
 }
 #endif /* CONFIG_SMP */
@@ -93,7 +93,7 @@ show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]);
 #endif
-               seq_printf(p, " %14s", irq_desc[irq].handler->typename);
+               seq_printf(p, " %14s", irq_desc[irq].chip->typename);
                seq_printf(p, "  %c%s",
                        (action->flags & SA_INTERRUPT)?'+':' ',
                        action->name);
index 9d34ce26e5efc9231eb3581de7b158438818944d..f20f2dff9c438599c6e182eaf9222bf34450b45a 100644 (file)
@@ -233,7 +233,7 @@ void __init
 init_rtc_irq(void)
 {
        irq_desc[RTC_IRQ].status = IRQ_DISABLED;
-       irq_desc[RTC_IRQ].handler = &rtc_irq_type;
+       irq_desc[RTC_IRQ].chip = &rtc_irq_type;
        setup_irq(RTC_IRQ, &timer_irqaction);
 }
 
index b188683b83fd04a4ec8265e4bf1c5c06da8c1694..ac893bd48036cf6cf613d82a042eb6860b690830 100644 (file)
@@ -109,7 +109,7 @@ init_i8259a_irqs(void)
 
        for (i = 0; i < 16; i++) {
                irq_desc[i].status = IRQ_DISABLED;
-               irq_desc[i].handler = &i8259a_irq_type;
+               irq_desc[i].chip = &i8259a_irq_type;
        }
 
        setup_irq(2, &cascade);
index 146a20b9e3d563208715c5033214e0e16d1d7f8e..3b581415bab0bdaa5e9607cb14faf4dc7debed10 100644 (file)
@@ -120,7 +120,7 @@ init_pyxis_irqs(unsigned long ignore_mask)
                if ((ignore_mask >> i) & 1)
                        continue;
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &pyxis_irq_type;
+               irq_desc[i].chip = &pyxis_irq_type;
        }
 
        setup_irq(16+7, &isa_cascade_irqaction);
index 0a87e466918c2e72fb59e4a5f087a1e5fa268007..8e4d121f84ccf87745aa6149e0a1a26e53649211 100644 (file)
@@ -67,7 +67,7 @@ init_srm_irqs(long max, unsigned long ignore_mask)
                if (i < 64 && ((ignore_mask >> i) & 1))
                        continue;
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &srm_irq_type;
+               irq_desc[i].chip = &srm_irq_type;
        }
 }
 
index d7f0e97fe56fbeed9a93f102116de960de9c40ec..1a1a2c7a3d944190c8699339c5f38086b434ee83 100644 (file)
@@ -144,7 +144,7 @@ alcor_init_irq(void)
                if (i >= 16+20 && i <= 16+30)
                        continue;
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &alcor_irq_type;
+               irq_desc[i].chip = &alcor_irq_type;
        }
        i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq;
 
index 8e3374d34c95bf2782a34ae7ce2ca749c56b8590..8c9e443d93ad6298b312e424ee48db22fd23ebe6 100644 (file)
@@ -124,7 +124,7 @@ common_init_irq(void (*srm_dev_int)(unsigned long v, struct pt_regs *r))
 
                for (i = 16; i < 35; ++i) {
                        irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-                       irq_desc[i].handler = &cabriolet_irq_type;
+                       irq_desc[i].chip = &cabriolet_irq_type;
                }
        }
 
index d5da6b1b28eec6cd557942ff1684f371a9ccc22a..b28c8f1c6e10b078fb0b1173ce64ad538bc23dda 100644 (file)
@@ -300,7 +300,7 @@ init_tsunami_irqs(struct hw_interrupt_type * ops, int imin, int imax)
        long i;
        for (i = imin; i <= imax; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = ops;
+               irq_desc[i].chip = ops;
        }
 }
 
index 61a79c354f0bdece82ed231db04aae15706fc226..aeb8e0277905660275943dd0b0678c3ba08a19b6 100644 (file)
@@ -137,7 +137,7 @@ eb64p_init_irq(void)
 
        for (i = 16; i < 32; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &eb64p_irq_type;
+               irq_desc[i].chip = &eb64p_irq_type;
        }               
 
        common_init_isa_dma();
index bd6e5f0e43c7e443b1d23dd6935df6d26d2e2e61..64a785baf53a0f1ffac8ebfcb904a4ec4c01c0d6 100644 (file)
@@ -154,7 +154,7 @@ eiger_init_irq(void)
 
        for (i = 16; i < 128; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &eiger_irq_type;
+               irq_desc[i].chip = &eiger_irq_type;
        }
 }
 
index fcabb7c96a16588f7367eb554d7b3ad8b9ee3047..0148e095638f8c6d40183ca098f49746f2f5d9f8 100644 (file)
@@ -206,11 +206,11 @@ jensen_init_irq(void)
 {
        init_i8259a_irqs();
 
-       irq_desc[1].handler = &jensen_local_irq_type;
-       irq_desc[4].handler = &jensen_local_irq_type;
-       irq_desc[3].handler = &jensen_local_irq_type;
-       irq_desc[7].handler = &jensen_local_irq_type;
-       irq_desc[9].handler = &jensen_local_irq_type;
+       irq_desc[1].chip = &jensen_local_irq_type;
+       irq_desc[4].chip = &jensen_local_irq_type;
+       irq_desc[3].chip = &jensen_local_irq_type;
+       irq_desc[7].chip = &jensen_local_irq_type;
+       irq_desc[9].chip = &jensen_local_irq_type;
 
        common_init_isa_dma();
 }
index e32fee50522076c7cfaf685d80690e2c0846c135..36d2159543769758904fe8125b7c037b4984efcc 100644 (file)
@@ -303,7 +303,7 @@ init_io7_irqs(struct io7 *io7,
        /* Set up the lsi irqs.  */
        for (i = 0; i < 128; ++i) {
                irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[base + i].handler = lsi_ops;
+               irq_desc[base + i].chip = lsi_ops;
        }
 
        /* Disable the implemented irqs in hardware.  */
@@ -317,7 +317,7 @@ init_io7_irqs(struct io7 *io7,
        /* Set up the msi irqs.  */
        for (i = 128; i < (128 + 512); ++i) {
                irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[base + i].handler = msi_ops;
+               irq_desc[base + i].chip = msi_ops;
        }
 
        for (i = 0; i < 16; ++i)
@@ -335,7 +335,7 @@ marvel_init_irq(void)
        /* Reserve the legacy irqs.  */
        for (i = 0; i < 16; ++i) {
                irq_desc[i].status = IRQ_DISABLED;
-               irq_desc[i].handler = &marvel_legacy_irq_type;
+               irq_desc[i].chip = &marvel_legacy_irq_type;
        }
 
        /* Init the io7 irqs.  */
index d78a0daa6168e3c3216b82f2f8bc514bd94ded74..b741600e3761a794450d07b278b6ffd2afe2b0ff 100644 (file)
@@ -117,7 +117,7 @@ mikasa_init_irq(void)
 
        for (i = 16; i < 32; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &mikasa_irq_type;
+               irq_desc[i].chip = &mikasa_irq_type;
        }
 
        init_i8259a_irqs();
index 65061f5d741062e01ed1487a7bb389ec770245b2..55db02d318d74172804f5ee67ae1ebd25e046b7d 100644 (file)
@@ -139,7 +139,7 @@ noritake_init_irq(void)
 
        for (i = 16; i < 48; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &noritake_irq_type;
+               irq_desc[i].chip = &noritake_irq_type;
        }
 
        init_i8259a_irqs();
index 05888a02a6049415e53b5ac0c84022eb39d5a605..949607e3d6fbe82395c641b1f94ecb3d99ef1b12 100644 (file)
@@ -180,7 +180,7 @@ rawhide_init_irq(void)
 
        for (i = 16; i < 128; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &rawhide_irq_type;
+               irq_desc[i].chip = &rawhide_irq_type;
        }
 
        init_i8259a_irqs();
index 58404243057b65711300cf786175f62597122f04..6ae50605263592061869345ecfe1856a1c33467e 100644 (file)
@@ -117,7 +117,7 @@ rx164_init_irq(void)
        rx164_update_irq_hw(0);
        for (i = 16; i < 40; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &rx164_irq_type;
+               irq_desc[i].chip = &rx164_irq_type;
        }
 
        init_i8259a_irqs();
index a7ff84474aceebc7603455ec09b8180471d09798..24dea40c9bfe823feea687efcea7677bb42bae12 100644 (file)
@@ -537,7 +537,7 @@ sable_lynx_init_irq(int nr_irqs)
 
        for (i = 0; i < nr_irqs; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &sable_lynx_irq_type;
+               irq_desc[i].chip = &sable_lynx_irq_type;
        }
 
        common_init_isa_dma();
index 7955bdfc2db0e2fabd4b44da9eed48ecc947ead2..2c75cd1fd81aab537e6b93615011baba52b98e2c 100644 (file)
@@ -154,7 +154,7 @@ takara_init_irq(void)
 
        for (i = 16; i < 128; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = &takara_irq_type;
+               irq_desc[i].chip = &takara_irq_type;
        }
 
        common_init_isa_dma();
index 2551fb49ae099150561407adc726e410b8e03c9f..13f3ed8ed7ac2f1c166d6d9392a0785bccbb71fd 100644 (file)
@@ -189,7 +189,7 @@ init_titan_irqs(struct hw_interrupt_type * ops, int imin, int imax)
        long i;
        for (i = imin; i <= imax; ++i) {
                irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i].handler = ops;
+               irq_desc[i].chip = ops;
        }
 }
 
index 1553f470246e6b74eecb0ba9630982d3a0cf5c97..22c5798fe083ba03cf16e88ec6fe4088fce61ce3 100644 (file)
@@ -199,14 +199,14 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
                if (i == 2)
                        continue;
                irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i+irq_bias].handler = &wildfire_irq_type;
+               irq_desc[i+irq_bias].chip = &wildfire_irq_type;
        }
 
        irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-       irq_desc[36+irq_bias].handler = &wildfire_irq_type;
+       irq_desc[36+irq_bias].chip = &wildfire_irq_type;
        for (i = 40; i < 64; ++i) {
                irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
-               irq_desc[i+irq_bias].handler = &wildfire_irq_type;
+               irq_desc[i+irq_bias].chip = &wildfire_irq_type;
        }
 
        setup_irq(32+irq_bias, &isa_enable);    
index 4b368a122015288dc1b04b9248f19ca8eefbb106..2d5be93b5197c202d37d41d0a4d6334fa0a271a0 100644 (file)
@@ -172,7 +172,7 @@ init_IRQ(void)
 
        /* Initialize IRQ handler descriptiors. */
        for(i = 2; i < NR_IRQS; i++) {
-               irq_desc[i].handler = &crisv10_irq_type;
+               irq_desc[i].chip = &crisv10_irq_type;
                set_int_vector(i, interrupt[i]);
        }
 
index c78cc2685133727f32bc3e6d514b08caf79f2aca..06260874f018f4ff7d5a9d1f8d07cf8ba2e6ca11 100644 (file)
@@ -369,7 +369,7 @@ init_IRQ(void)
 
        /* Point all IRQ's to bad handlers. */
        for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
-               irq_desc[j].handler = &crisv32_irq_type;
+               irq_desc[j].chip = &crisv32_irq_type;
                set_exception_vector(i, interrupt[j]);
        }
 
index b504def3e346944cc65fad1a5b55cc391f145eb1..6547bb64636419de268dadcccea8d7b89c84c425 100644 (file)
@@ -69,7 +69,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
index c1a42feba28667cd8e0b7662aafe0fdb79607a23..3c6063671a9f94b4beabb137539880acdc105054 100644 (file)
@@ -132,7 +132,7 @@ void make_8259A_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
        io_apic_irqs &= ~(1<<irq);
-       irq_desc[irq].handler = &i8259A_irq_type;
+       irq_desc[irq].chip = &i8259A_irq_type;
        enable_irq(irq);
 }
 
@@ -386,12 +386,12 @@ void __init init_ISA_irqs (void)
                        /*
                         * 16 old-style INTA-cycle interrupts:
                         */
-                       irq_desc[i].handler = &i8259A_irq_type;
+                       irq_desc[i].chip = &i8259A_irq_type;
                } else {
                        /*
                         * 'high' PCI IRQs filled in on demand
                         */
-                       irq_desc[i].handler = &no_irq_type;
+                       irq_desc[i].chip = &no_irq_type;
                }
        }
 }
index 72ae414e4d4976437fefa8a01e1b38d97fdc0395..4a74b696c6a3c82eb5e743189bd5ffbeb45b36e0 100644 (file)
@@ -1205,15 +1205,17 @@ static struct hw_interrupt_type ioapic_edge_type;
 #define IOAPIC_EDGE    0
 #define IOAPIC_LEVEL   1
 
-static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger)
+static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
 {
-       unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
+       unsigned idx;
+
+       idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
 
        if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
                        trigger == IOAPIC_LEVEL)
-               irq_desc[idx].handler = &ioapic_level_type;
+               irq_desc[idx].chip = &ioapic_level_type;
        else
-               irq_desc[idx].handler = &ioapic_edge_type;
+               irq_desc[idx].chip = &ioapic_edge_type;
        set_intr_gate(vector, interrupt[idx]);
 }
 
@@ -1325,7 +1327,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
         * The timer IRQ doesn't have to know that behind the
         * scene we have a 8259A-master in AEOI mode ...
         */
-       irq_desc[0].handler = &ioapic_edge_type;
+       irq_desc[0].chip = &ioapic_edge_type;
 
        /*
         * Add it to the IO-APIC irq-routing table:
@@ -2135,7 +2137,7 @@ static inline void init_IO_APIC_traps(void)
                                make_8259A_irq(irq);
                        else
                                /* Strange. Oh, well.. */
-                               irq_desc[irq].handler = &no_irq_type;
+                               irq_desc[irq].chip = &no_irq_type;
                }
        }
 }
@@ -2351,7 +2353,7 @@ static inline void check_timer(void)
        printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
 
        disable_8259A_irq(0);
-       irq_desc[0].handler = &lapic_irq_type;
+       irq_desc[0].chip = &lapic_irq_type;
        apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector);   /* Fixed mode */
        enable_8259A_irq(0);
 
index 9eec9435318ea4053f80a1f097edcff6bce0184a..b942a5918dabce88892fee0178b9739212d9fca2 100644 (file)
@@ -249,7 +249,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -296,8 +296,8 @@ void fixup_irqs(cpumask_t map)
                        printk("Breaking affinity for irq %i\n", irq);
                        mask = map;
                }
-               if (irq_desc[irq].handler->set_affinity)
-                       irq_desc[irq].handler->set_affinity(irq, mask);
+               if (irq_desc[irq].chip->set_affinity)
+                       irq_desc[irq].chip->set_affinity(irq, mask);
                else if (irq_desc[irq].action && !(warned++))
                        printk("Cannot set affinity for irq %i\n", irq);
        }
index 3e64fb7212911bc4db9fe8db9f67ab75a40ecd36..c418521dd5547073cf78bfbf0e9bb710366cb3b0 100644 (file)
@@ -278,22 +278,22 @@ void init_VISWS_APIC_irqs(void)
                irq_desc[i].depth = 1;
 
                if (i == 0) {
-                       irq_desc[i].handler = &cobalt_irq_type;
+                       irq_desc[i].chip = &cobalt_irq_type;
                }
                else if (i == CO_IRQ_IDE0) {
-                       irq_desc[i].handler = &cobalt_irq_type;
+                       irq_desc[i].chip = &cobalt_irq_type;
                }
                else if (i == CO_IRQ_IDE1) {
-                       irq_desc[i].handler = &cobalt_irq_type;
+                       irq_desc[i].chip = &cobalt_irq_type;
                }
                else if (i == CO_IRQ_8259) {
-                       irq_desc[i].handler = &piix4_master_irq_type;
+                       irq_desc[i].chip = &piix4_master_irq_type;
                }
                else if (i < CO_IRQ_APIC0) {
-                       irq_desc[i].handler = &piix4_virtual_irq_type;
+                       irq_desc[i].chip = &piix4_virtual_irq_type;
                }
                else if (IS_CO_APIC(i)) {
-                       irq_desc[i].handler = &cobalt_irq_type;
+                       irq_desc[i].chip = &cobalt_irq_type;
                }
        }
 
index 8242af9ebc6f99b4fb0e24dfff4f3d4b68d393c4..5b8b579a079fa8a7afdc52e4871aef91b3a94665 100644 (file)
@@ -1419,7 +1419,7 @@ smp_intr_init(void)
         * This is for later: first 16 correspond to PC IRQs; next 16
         * are Primary MC IRQs and final 16 are Secondary MC IRQs */
        for(i = 0; i < 48; i++)
-               irq_desc[i].handler = &vic_irq_type;
+               irq_desc[i].chip = &vic_irq_type;
 }
 
 /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
index d58c1c5c903a9cfdae0981411ae53604fce020f1..abb4cb1c831eac295f213c300ed2eb140a0f53c6 100644 (file)
@@ -660,13 +660,13 @@ register_intr (unsigned int gsi, int vector, unsigned char delivery,
                irq_type = &irq_type_iosapic_level;
 
        idesc = irq_descp(vector);
-       if (idesc->handler != irq_type) {
-               if (idesc->handler != &no_irq_type)
+       if (idesc->chip != irq_type) {
+               if (idesc->chip != &no_irq_type)
                        printk(KERN_WARNING
                               "%s: changing vector %d from %s to %s\n",
                               __FUNCTION__, vector,
-                              idesc->handler->typename, irq_type->typename);
-               idesc->handler = irq_type;
+                              idesc->chip->typename, irq_type->typename);
+               idesc->chip = irq_type;
        }
        return 0;
 }
@@ -903,7 +903,7 @@ iosapic_unregister_intr (unsigned int gsi)
                        BUG_ON(iosapic_intr_info[vector].count);
 
                        /* Clear the interrupt controller descriptor */
-                       idesc->handler = &no_irq_type;
+                       idesc->chip = &no_irq_type;
 
                        /* Clear the interrupt information */
                        memset(&iosapic_intr_info[vector], 0,
index 9c72ea3f6432d115ca32090d0c8bd9c8365d5c07..2645153dba8aae768e260e208ad1bb1fad52bf3a 100644 (file)
@@ -76,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
                }
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -144,15 +144,15 @@ static void migrate_irqs(void)
                        /*
                         * Al three are essential, currently WARN_ON.. maybe panic?
                         */
-                       if (desc->handler && desc->handler->disable &&
-                               desc->handler->enable && desc->handler->set_affinity) {
-                               desc->handler->disable(irq);
-                               desc->handler->set_affinity(irq, mask);
-                               desc->handler->enable(irq);
+                       if (desc->chip && desc->chip->disable &&
+                               desc->chip->enable && desc->chip->set_affinity) {
+                               desc->chip->disable(irq);
+                               desc->chip->set_affinity(irq, mask);
+                               desc->chip->enable(irq);
                        } else {
-                               WARN_ON((!(desc->handler) || !(desc->handler->disable) ||
-                                               !(desc->handler->enable) ||
-                                               !(desc->handler->set_affinity)));
+                               WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
+                                               !(desc->chip->enable) ||
+                                               !(desc->chip->set_affinity)));
                        }
                }
        }
index ef9a2b49307ae756ac58a8fb7f8c360aa2aca53a..6d8fc9498ed971c6096b9d80cb7f285fbc563f6f 100644 (file)
@@ -251,7 +251,7 @@ register_percpu_irq (ia64_vector vec, struct irqaction *action)
                if (irq_to_vector(irq) == vec) {
                        desc = irq_descp(irq);
                        desc->status |= IRQ_PER_CPU;
-                       desc->handler = &irq_type_ia64_lsapic;
+                       desc->chip = &irq_type_ia64_lsapic;
                        if (action)
                                setup_irq(irq, action);
                }
index 44e9547878ac7310b6f11502d1a709fd5805bd66..d69288055599d20fd243bb156dfe07623146a787 100644 (file)
@@ -684,9 +684,9 @@ int migrate_platform_irqs(unsigned int cpu)
                         * polling before making changes.
                         */
                        if (desc) {
-                               desc->handler->disable(ia64_cpe_irq);
-                               desc->handler->set_affinity(ia64_cpe_irq, mask);
-                               desc->handler->enable(ia64_cpe_irq);
+                               desc->chip->disable(ia64_cpe_irq);
+                               desc->chip->set_affinity(ia64_cpe_irq, mask);
+                               desc->chip->enable(ia64_cpe_irq);
                                printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
                        }
                }
index 677c6c0fd66188b69e8df0194c2f3654360f00f4..7bb6ad188ba39855f1516465e4fee89f5b4ef145 100644 (file)
@@ -225,8 +225,8 @@ void sn_irq_init(void)
        ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
 
        for (i = 0; i < NR_IRQS; i++) {
-               if (base_desc[i].handler == &no_irq_type) {
-                       base_desc[i].handler = &irq_type_sn;
+               if (base_desc[i].chip == &no_irq_type) {
+                       base_desc[i].chip = &irq_type_sn;
                }
        }
 }
index a4634b06f67554ffeb3f9c84f33bb213ca493b7b..3841861df6a2a0565fc19aad6b59e8a5fa0490ee 100644 (file)
@@ -54,7 +54,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
index 6328e1357a80637c324421ffed54af28e223f804..f9f56c2701951c10f0c44883c57a8f89fa3ddf2b 100644 (file)
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type;
+       irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type;
        irq_desc[M32R_IRQ_INT0].action = 0;
        irq_desc[M32R_IRQ_INT0].depth = 1;
        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
@@ -113,7 +113,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
index fad1fc99bb272d8b4d485bc9346de58f027c2468..b6ab00eff58057db820edf51c06cfdc08a4b5017 100644 (file)
@@ -301,7 +301,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
        irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-       irq_desc[M32700UT_LAN_IRQ_LAN].handler = &m32700ut_lanpld_irq_type;
+       irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
        irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
        irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1;       /* disable nested irq */
        lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;   /* "H" edge sense */
@@ -310,7 +310,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -318,7 +318,7 @@ void __init init_IRQ(void)
 
        /* SIO0 : receive */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -326,7 +326,7 @@ void __init init_IRQ(void)
 
        /* SIO0 : send */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -334,7 +334,7 @@ void __init init_IRQ(void)
 
        /* SIO1 : receive */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -342,7 +342,7 @@ void __init init_IRQ(void)
 
        /* SIO1 : send */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -350,7 +350,7 @@ void __init init_IRQ(void)
 
        /* DMA1 : */
        irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_DMA1].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_DMA1].action = 0;
        irq_desc[M32R_IRQ_DMA1].depth = 1;
        icu_data[M32R_IRQ_DMA1].icucr = 0;
@@ -359,7 +359,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
        /* INT#1: SIO0 Receive on PLD */
        irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SIO0_RCV].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
        irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;   /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -367,7 +367,7 @@ void __init init_IRQ(void)
 
        /* INT#1: SIO0 Send on PLD */
        irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SIO0_SND].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_SIO0_SND].action = 0;
        irq_desc[PLD_IRQ_SIO0_SND].depth = 1;   /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -376,7 +376,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC IREQ on PLD */
        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFIREQ].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_CFIREQ].action = 0;
        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;       /* 'L' level sense */
@@ -384,7 +384,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC Insert on PLD */
        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_INSERT].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;   /* 'L' edge sense */
@@ -392,7 +392,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC Eject on PLD */
        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_EJECT].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;    /* 'H' edge sense */
@@ -416,7 +416,7 @@ void __init init_IRQ(void)
        outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
 
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[M32700UT_LCD_IRQ_USB_INT1].handler = &m32700ut_lcdpld_irq_type;
+    irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
     irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
     lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
@@ -434,7 +434,7 @@ void __init init_IRQ(void)
         * INT3# is used for AR
         */
        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT3].handler = &m32700ut_irq_type;
+       irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
        irq_desc[M32R_IRQ_INT3].action = 0;
        irq_desc[M32R_IRQ_INT3].depth = 1;
        icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
index 00f253209cb36a0fd8db56407ed88c9d75a5cde0..c268044185f543ed4ffd936996fb29e01c6f1e29 100644 (file)
@@ -86,7 +86,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_NE2000
        /* INT0 : LAN controller (RTL8019AS) */
        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_INT0].action = 0;
        irq_desc[M32R_IRQ_INT0].depth = 1;
        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -95,7 +95,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -104,7 +104,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -112,7 +112,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -120,7 +120,7 @@ void __init init_IRQ(void)
 
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_PCC)
        /* INT1 : pccard0 interrupt */
        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_INT1].action = 0;
        irq_desc[M32R_IRQ_INT1].depth = 1;
        icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
@@ -146,7 +146,7 @@ void __init init_IRQ(void)
 
        /* INT2 : pccard1 interrupt */
        irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_INT2].action = 0;
        irq_desc[M32R_IRQ_INT2].depth = 1;
        icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
index eebc9d8b4e72be56fc49df85fe84fca54def62ec..bd2327d5cca28a1528a8f0ae1fec9b83231a7fec 100644 (file)
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT0 : LAN controller (SMC91111) */
        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT0].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_INT0].action = 0;
        irq_desc[M32R_IRQ_INT0].depth = 1;
        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
        disable_mappi2_irq(M32R_IRQ_SIO0_S);
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_USB)
        /* INT1 : USB Host controller interrupt */
        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT1].handler = &mappi2_irq_type;
+       irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
        irq_desc[M32R_IRQ_INT1].action = 0;
        irq_desc[M32R_IRQ_INT1].depth = 1;
        icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
 
        /* ICUCR40: CFC IREQ */
        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFIREQ].handler = &mappi2_irq_type;
+       irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
        irq_desc[PLD_IRQ_CFIREQ].action = 0;
        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
        icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
        /* ICUCR41: CFC Insert */
        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi2_irq_type;
+       irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
        icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -164,7 +164,7 @@ void __init init_IRQ(void)
 
        /* ICUCR42: CFC Eject */
        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi2_irq_type;
+       irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
        icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
index d2ff021e2d3dc7d1acf2c7f2be0b77601210b1a4..014b51d17505a3e9fd047f79b82f20508d813d9d 100644 (file)
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT0 : LAN controller (SMC91111) */
        irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_INT0].action = 0;
        irq_desc[M32R_IRQ_INT0].depth = 1;
        icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
        disable_mappi3_irq(M32R_IRQ_SIO0_S);
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_USB)
        /* INT1 : USB Host controller interrupt */
        irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type;
+       irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
        irq_desc[M32R_IRQ_INT1].action = 0;
        irq_desc[M32R_IRQ_INT1].depth = 1;
        icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
 
        /* CFC IREQ */
        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type;
+       irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
        irq_desc[PLD_IRQ_CFIREQ].action = 0;
        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
        icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
        /* ICUCR41: CFC Insert & eject */
        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type;
+       irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
        icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -166,7 +166,7 @@ void __init init_IRQ(void)
 
        /* IDE IREQ */
        irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_IDEIREQ].handler = &mappi3_irq_type;
+       irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
        irq_desc[PLD_IRQ_IDEIREQ].action = 0;
        irq_desc[PLD_IRQ_IDEIREQ].depth = 1;    /* disable nested irq */
        icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
index 0e9e63538c0f051cd95cedf7659c9e845d5c2cb3..ea64831aef7ad536869cfdd9dccb63c6ca47b3f6 100644 (file)
@@ -85,7 +85,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_NE2000
        /* INT3 : LAN controller (RTL8019AS) */
        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT3].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_INT3].action = 0;
        irq_desc[M32R_IRQ_INT3].depth = 1;
        icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -94,7 +94,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -103,7 +103,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -111,7 +111,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -119,7 +119,7 @@ void __init init_IRQ(void)
 
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -127,7 +127,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &oaks32r_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
index 548e8fc7949b113a39a697f1cce1407b03c938f5..55e8972d455aedd27a132766a3c89ad42f388474 100644 (file)
@@ -302,7 +302,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SMC91X)
        /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
        irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
-       irq_desc[OPSPUT_LAN_IRQ_LAN].handler = &opsput_lanpld_irq_type;
+       irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
        irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
        irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
        lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;     /* "H" edge sense */
@@ -311,7 +311,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -319,7 +319,7 @@ void __init init_IRQ(void)
 
        /* SIO0 : receive */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -327,7 +327,7 @@ void __init init_IRQ(void)
 
        /* SIO0 : send */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -335,7 +335,7 @@ void __init init_IRQ(void)
 
        /* SIO1 : receive */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -343,7 +343,7 @@ void __init init_IRQ(void)
 
        /* SIO1 : send */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -351,7 +351,7 @@ void __init init_IRQ(void)
 
        /* DMA1 : */
        irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_DMA1].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_DMA1].action = 0;
        irq_desc[M32R_IRQ_DMA1].depth = 1;
        icu_data[M32R_IRQ_DMA1].icucr = 0;
@@ -360,7 +360,7 @@ void __init init_IRQ(void)
 #ifdef CONFIG_SERIAL_M32R_PLDSIO
        /* INT#1: SIO0 Receive on PLD */
        irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SIO0_RCV].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
        irq_desc[PLD_IRQ_SIO0_RCV].depth = 1;   /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -368,7 +368,7 @@ void __init init_IRQ(void)
 
        /* INT#1: SIO0 Send on PLD */
        irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SIO0_SND].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_SIO0_SND].action = 0;
        irq_desc[PLD_IRQ_SIO0_SND].depth = 1;   /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -378,7 +378,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_M32R_CFC)
        /* INT#1: CFC IREQ on PLD */
        irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFIREQ].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_CFIREQ].action = 0;
        irq_desc[PLD_IRQ_CFIREQ].depth = 1;     /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;       /* 'L' level sense */
@@ -386,7 +386,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC Insert on PLD */
        irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_INSERT].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
        irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00;   /* 'L' edge sense */
@@ -394,7 +394,7 @@ void __init init_IRQ(void)
 
        /* INT#1: CFC Eject on PLD */
        irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_CFC_EJECT].handler = &opsput_pld_irq_type;
+       irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
        irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
        irq_desc[PLD_IRQ_CFC_EJECT].depth = 1;  /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02;    /* 'H' edge sense */
@@ -420,7 +420,7 @@ void __init init_IRQ(void)
        outw(USBCR_OTGS, USBCR);        /* USBCR: non-OTG */
 
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
-    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].handler = &opsput_lcdpld_irq_type;
+    irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
     irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
     lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01;   /* "L" level sense */
@@ -438,7 +438,7 @@ void __init init_IRQ(void)
         * INT3# is used for AR
         */
        irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_INT3].handler = &opsput_irq_type;
+       irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
        irq_desc[M32R_IRQ_INT3].action = 0;
        irq_desc[M32R_IRQ_INT3].depth = 1;
        icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
index 64be659a23e7efca76532e72e84c952ec6bd76a3..7fa12d8f66b47d63d8695422d429cc515a7a1f10 100644 (file)
@@ -158,7 +158,7 @@ void __init init_IRQ(void)
 
        /* MFT2 : system timer */
        irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_MFT2].action = 0;
        irq_desc[M32R_IRQ_MFT2].depth = 1;
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -167,7 +167,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SERIAL_M32R_SIO)
        /* SIO0_R : uart receive data */
        irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO0_R].action = 0;
        irq_desc[M32R_IRQ_SIO0_R].depth = 1;
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -175,7 +175,7 @@ void __init init_IRQ(void)
 
        /* SIO0_S : uart send data */
        irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO0_S].action = 0;
        irq_desc[M32R_IRQ_SIO0_S].depth = 1;
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -183,7 +183,7 @@ void __init init_IRQ(void)
 
        /* SIO1_R : uart receive data */
        irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO1_R].action = 0;
        irq_desc[M32R_IRQ_SIO1_R].depth = 1;
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -191,7 +191,7 @@ void __init init_IRQ(void)
 
        /* SIO1_S : uart send data */
        irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
-       irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type;
+       irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
        irq_desc[M32R_IRQ_SIO1_S].action = 0;
        irq_desc[M32R_IRQ_SIO1_S].depth = 1;
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -201,7 +201,7 @@ void __init init_IRQ(void)
        /* INT#67-#71: CFC#0 IREQ on PLD */
        for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) {
                irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
-               irq_desc[PLD_IRQ_CF0 + i].handler = &m32700ut_pld_irq_type;
+               irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
                irq_desc[PLD_IRQ_CF0 + i].action = 0;
                irq_desc[PLD_IRQ_CF0 + i].depth = 1;    /* disable nested irq */
                pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
@@ -212,7 +212,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
        /* INT#76: 16552D#0 IREQ on PLD */
        irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_UART0].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_UART0].action = 0;
        irq_desc[PLD_IRQ_UART0].depth = 1;      /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
@@ -221,7 +221,7 @@ void __init init_IRQ(void)
 
        /* INT#77: 16552D#1 IREQ on PLD */
        irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_UART1].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_UART1].action = 0;
        irq_desc[PLD_IRQ_UART1].depth = 1;      /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
@@ -232,7 +232,7 @@ void __init init_IRQ(void)
 #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
        /* INT#80: AK4524 IREQ on PLD */
        irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
-       irq_desc[PLD_IRQ_SNDINT].handler = &m32700ut_pld_irq_type;
+       irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
        irq_desc[PLD_IRQ_SNDINT].action = 0;
        irq_desc[PLD_IRQ_SNDINT].depth = 1;     /* disable nested irq */
        pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
index afe05ec12c27d31326d73937081eb7e0631d1c33..da74ac21954bb573408c7936b471092cb03a50d9 100644 (file)
@@ -333,31 +333,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
                                au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG0SET);
-                               irq_desc[irq_nr].handler = &rise_edge_irq_type;
+                               irq_desc[irq_nr].chip = &rise_edge_irq_type;
                                break;
                        case INTC_INT_FALL_EDGE: /* 0:1:0 */
                                au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG1SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
-                               irq_desc[irq_nr].handler = &fall_edge_irq_type;
+                               irq_desc[irq_nr].chip = &fall_edge_irq_type;
                                break;
                        case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
                                au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG1SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG0SET);
-                               irq_desc[irq_nr].handler = &either_edge_irq_type;
+                               irq_desc[irq_nr].chip = &either_edge_irq_type;
                                break;
                        case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
                                au_writel(1<<(irq_nr-32), IC1_CFG2SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
                                au_writel(1<<(irq_nr-32), IC1_CFG0SET);
-                               irq_desc[irq_nr].handler = &level_irq_type;
+                               irq_desc[irq_nr].chip = &level_irq_type;
                                break;
                        case INTC_INT_LOW_LEVEL: /* 1:1:0 */
                                au_writel(1<<(irq_nr-32), IC1_CFG2SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG1SET);
                                au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
-                               irq_desc[irq_nr].handler = &level_irq_type;
+                               irq_desc[irq_nr].chip = &level_irq_type;
                                break;
                        case INTC_INT_DISABLED: /* 0:0:0 */
                                au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
@@ -385,31 +385,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
                                au_writel(1<<irq_nr, IC0_CFG2CLR);
                                au_writel(1<<irq_nr, IC0_CFG1CLR);
                                au_writel(1<<irq_nr, IC0_CFG0SET);
-                               irq_desc[irq_nr].handler = &rise_edge_irq_type;
+                               irq_desc[irq_nr].chip = &rise_edge_irq_type;
                                break;
                        case INTC_INT_FALL_EDGE: /* 0:1:0 */
                                au_writel(1<<irq_nr, IC0_CFG2CLR);
                                au_writel(1<<irq_nr, IC0_CFG1SET);
                                au_writel(1<<irq_nr, IC0_CFG0CLR);
-                               irq_desc[irq_nr].handler = &fall_edge_irq_type;
+                               irq_desc[irq_nr].chip = &fall_edge_irq_type;
                                break;
                        case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
                                au_writel(1<<irq_nr, IC0_CFG2CLR);
                                au_writel(1<<irq_nr, IC0_CFG1SET);
                                au_writel(1<<irq_nr, IC0_CFG0SET);
-                               irq_desc[irq_nr].handler = &either_edge_irq_type;
+                               irq_desc[irq_nr].chip = &either_edge_irq_type;
                                break;
                        case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
                                au_writel(1<<irq_nr, IC0_CFG2SET);
                                au_writel(1<<irq_nr, IC0_CFG1CLR);
                                au_writel(1<<irq_nr, IC0_CFG0SET);
-                               irq_desc[irq_nr].handler = &level_irq_type;
+                               irq_desc[irq_nr].chip = &level_irq_type;
                                break;
                        case INTC_INT_LOW_LEVEL: /* 1:1:0 */
                                au_writel(1<<irq_nr, IC0_CFG2SET);
                                au_writel(1<<irq_nr, IC0_CFG1SET);
                                au_writel(1<<irq_nr, IC0_CFG0CLR);
-                               irq_desc[irq_nr].handler = &level_irq_type;
+                               irq_desc[irq_nr].chip = &level_irq_type;
                                break;
                        case INTC_INT_DISABLED: /* 0:0:0 */
                                au_writel(1<<irq_nr, IC0_CFG0CLR);
index bacc0c6bfe675e5f3570371ea4f98a9004664ee7..5dd164fc1889290e243d0855ba1978aecf932dc7 100644 (file)
@@ -172,7 +172,7 @@ void _board_init_irq(void)
 
        for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
        {
-               irq_desc[irq_nr].handler = &external_irq_type;
+               irq_desc[irq_nr].chip = &external_irq_type;
                pb1200_disable_irq(irq_nr);
        }
 
index 5fcd5f070cdcf6a52cdf5a9ed52185be36932fbb..63c3d6534b3a108bd8d87d11838d585fea80e790 100644 (file)
@@ -107,7 +107,7 @@ void __init vrc5477_irq_init(u32 irq_base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &vrc5477_irq_controller;
+               irq_desc[i].chip = &vrc5477_irq_controller;
        }
 
        vrc5477_irq_base = irq_base;
index d5bca5d233b6e6b67d32546d7789b9be1052926f..da2dbb42f913fc21bfd7dd0177d5ec393ae5a82c 100644 (file)
@@ -144,13 +144,13 @@ void __init init_ioasic_irqs(int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &ioasic_irq_type;
+               irq_desc[i].chip = &ioasic_irq_type;
        }
        for (; i < base + IO_IRQ_LINES; i++) {
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &ioasic_dma_irq_type;
+               irq_desc[i].chip = &ioasic_dma_irq_type;
        }
 
        ioasic_irq_base = base;
index 898bed502a348fb3a7572e8bd65d550a20d0f46c..d44c00d9e80fa973f32100d4e8c192d4d53b741c 100644 (file)
@@ -123,7 +123,7 @@ void __init init_kn02_irqs(int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &kn02_irq_type;
+               irq_desc[i].chip = &kn02_irq_type;
        }
 
        kn02_irq_base = base;
index 46c468b26b30879c72b82e01e52a271b32e61d2a..f489a8067a93fa46570378fd85a5345beb78226c 100644 (file)
@@ -138,7 +138,7 @@ void __init arch_init_irq(void)
        /*  Let's initialize our IRQ descriptors  */
        for (i = 0; i < NR_IRQS; i++) {
                irq_desc[i].status = 0;
-               irq_desc[i].handler = &no_irq_type;
+               irq_desc[i].chip = &no_irq_type;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 0;
                spin_lock_init(&irq_desc[i].lock);
index 77be7216bdd091430735ccb89c1e356144a779fd..a6749c56fe38d620ea29ca4546fc6a79baf31470 100644 (file)
@@ -208,10 +208,10 @@ void __init arch_init_irq(void)
 #endif
 
        for (i = 0; i <= IT8172_LAST_IRQ; i++) {
-               irq_desc[i].handler = &it8172_irq_type;
+               irq_desc[i].chip = &it8172_irq_type;
                spin_lock_init(&irq_desc[i].lock);
        }
-       irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type;
+       irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type;
        set_c0_status(ALLINTS_NOTIMER);
 }
 
index becc9accd49573e5d24e052a8e3d8e2e40699339..478be9858a1e04117eb3456e2200119a083b9f04 100644 (file)
@@ -73,7 +73,7 @@ void __init init_r4030_ints(void)
                irq_desc[i].status     = IRQ_DISABLED;
                irq_desc[i].action     = 0;
                irq_desc[i].depth      = 1;
-               irq_desc[i].handler    = &r4030_irq_type;
+               irq_desc[i].chip    = &r4030_irq_type;
        }
 
        r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
index 11304d1354f45b0d47afc511e9a7811fa9383ca6..380046ea1db55103f5ddbcc2c23e459b951c04ac 100644 (file)
@@ -435,7 +435,7 @@ void jmr3927_irq_init(u32 irq_base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &jmr3927_irq_controller;
+               irq_desc[i].chip = &jmr3927_irq_controller;
        }
 
        jmr3927_irq_base = irq_base;
index 0cb8ed5662f3d2cbaa1f0ac6cde7cbfa6f5ff8bb..91ffb1233cad92cda4ce6ad163bc880798f7533a 100644 (file)
@@ -120,7 +120,7 @@ int i8259A_irq_pending(unsigned int irq)
 void make_8259A_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &i8259A_irq_type;
+       irq_desc[irq].chip = &i8259A_irq_type;
        enable_irq(irq);
 }
 
@@ -327,7 +327,7 @@ void __init init_i8259_irqs (void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &i8259A_irq_type;
+               irq_desc[i].chip = &i8259A_irq_type;
        }
 
        setup_irq(2, &irq2);
index 97ebdc754b9e6e8a59a1edf02611819872e606fb..f8cd1ac64d88314785849eec94f3d801b49943d7 100644 (file)
@@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
 
                switch (imp->im_type) {
                case MSC01_IRQ_EDGE:
-                       irq_desc[base+n].handler = &msc_edgeirq_type;
+                       irq_desc[base+n].chip = &msc_edgeirq_type;
                        if (cpu_has_veic)
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
                        else
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
                        break;
                case MSC01_IRQ_LEVEL:
-                       irq_desc[base+n].handler = &msc_levelirq_type;
+                       irq_desc[base+n].chip = &msc_levelirq_type;
                        if (cpu_has_veic)
                                MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
                        else
index 0613f1f36b1bb0f9dabb0adfcbfbf98b5d378e3c..f9c763a65547f0cc8760aaa8eaf61d8bdbe7d1b4 100644 (file)
@@ -155,7 +155,7 @@ void __init mv64340_irq_init(unsigned int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 2;
-               irq_desc[i].handler = &mv64340_irq_type;
+               irq_desc[i].chip = &mv64340_irq_type;
        }
 
        irq_base = base;
index 0b130c5ac5d915d6eee4df811cd4b7a5543b2c50..121da385a94d05216488abe15a20b398521e5ff4 100644 (file)
@@ -91,7 +91,7 @@ void __init rm7k_cpu_irq_init(int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &rm7k_irq_controller;
+               irq_desc[i].chip = &rm7k_irq_controller;
        }
 
        irq_base = base;
index 9b5f20c32acb97177b946fdb1c1a863c1a03cd1b..25109c103e44dff4ed3216ce45f7f27a39bc1732 100644 (file)
@@ -139,11 +139,11 @@ void __init rm9k_cpu_irq_init(int base)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &rm9k_irq_controller;
+               irq_desc[i].chip = &rm9k_irq_controller;
        }
 
        rm9000_perfcount_irq = base + 1;
-       irq_desc[rm9000_perfcount_irq].handler = &rm9k_perfcounter_irq;
+       irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq;
 
        irq_base = base;
 }
index 3dce742e716fd3df1b36920dc3606d2e91fb056b..5c9dcd5eed59e7cf3459381990e873346d329d5a 100644 (file)
@@ -95,7 +95,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -137,7 +137,7 @@ void __init init_IRQ(void)
                irq_desc[i].status  = IRQ_DISABLED;
                irq_desc[i].action  = NULL;
                irq_desc[i].depth   = 1;
-               irq_desc[i].handler = &no_irq_type;
+               irq_desc[i].chip = &no_irq_type;
                spin_lock_init(&irq_desc[i].lock);
 #ifdef CONFIG_MIPS_MT_SMTC
                irq_hwmask[i] = 0;
index 5db67e31ec1accf28c0150ed43a8d91176a3609a..0e455a8ad860d612fa282a775d962275cc5f589e 100644 (file)
@@ -167,14 +167,14 @@ void __init mips_cpu_irq_init(int irq_base)
                        irq_desc[i].status = IRQ_DISABLED;
                        irq_desc[i].action = NULL;
                        irq_desc[i].depth = 1;
-                       irq_desc[i].handler = &mips_mt_cpu_irq_controller;
+                       irq_desc[i].chip = &mips_mt_cpu_irq_controller;
                }
 
        for (i = irq_base + 2; i < irq_base + 8; i++) {
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &mips_cpu_irq_controller;
+               irq_desc[i].chip = &mips_cpu_irq_controller;
        }
 
        mips_cpu_irq_base = irq_base;
index 2d3472b21ebbe3ad62b98ff3046380b0039107a3..9316a024a8188ed8d2e92d5db266263b08e2b47a 100644 (file)
@@ -156,6 +156,6 @@ void __init arch_init_irq(void)
                irq_desc[i].status      = IRQ_DISABLED;
                irq_desc[i].action      = 0;
                irq_desc[i].depth       = 1;
-               irq_desc[i].handler     = &lasat_irq_type;
+               irq_desc[i].chip        = &lasat_irq_type;
        }
 }
index db53950b7cfbae7bd9e8936ede6fd6f6f5c64882..9dd6b89255818ddbf22fbcc86e4f294b834c1499 100644 (file)
@@ -215,7 +215,7 @@ void __init arch_init_irq(void)
                irq_desc[i].status      = IRQ_DISABLED;
                irq_desc[i].action      = 0;
                irq_desc[i].depth       = 1;
-               irq_desc[i].handler     = &atlas_irq_type;
+               irq_desc[i].chip        = &atlas_irq_type;
                spin_lock_init(&irq_desc[i].lock);
        }
 }
index bd885785e2f992f6dd2d80295e5afa427c67551e..31d179c4673fe55cf9c812bcd813963b547a8fa1 100644 (file)
@@ -147,6 +147,6 @@ void cpci_irq_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 2;
-               irq_desc[i].handler = &cpci_irq_type;
+               irq_desc[i].chip = &cpci_irq_type;
        }
 }
index 755bde5146be1d5d0b77bb319e91be12ecb8923d..852265026fd1f5b830e3e172268c1b7a7425ab35 100644 (file)
@@ -137,10 +137,10 @@ void uart_irq_init(void)
        irq_desc[80].status = IRQ_DISABLED;
        irq_desc[80].action = 0;
        irq_desc[80].depth = 2;
-       irq_desc[80].handler = &uart_irq_type;
+       irq_desc[80].chip = &uart_irq_type;
 
        irq_desc[81].status = IRQ_DISABLED;
        irq_desc[81].action = 0;
        irq_desc[81].depth = 2;
-       irq_desc[81].handler = &uart_irq_type;
+       irq_desc[81].chip = &uart_irq_type;
 }
index 39ee6314f62757279e12118448a04b70713fb2a7..8f18764a235956c6dbb14825b8cabba6daf8dd91 100644 (file)
@@ -236,7 +236,7 @@ void __init arch_init_irq(void)
        int configPR;
 
        for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
-               irq_desc[i].handler = &level_irq_type;
+               irq_desc[i].chip = &level_irq_type;
                pnx8550_ack(i); /* mask the irq just in case  */
        }
 
@@ -273,7 +273,7 @@ void __init arch_init_irq(void)
                /* mask/priority is still 0 so we will not get any
                 * interrupts until it is unmasked */
 
-               irq_desc[i].handler = &level_irq_type;
+               irq_desc[i].chip = &level_irq_type;
        }
 
        /* Priority level 0 */
@@ -282,12 +282,12 @@ void __init arch_init_irq(void)
        /* Set int vector table address */
        PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0;
 
-       irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type;
+       irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type;
        setup_irq(MIPS_CPU_GIC_IRQ, &gic_action);
 
        /* init of Timer interrupts */
        for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) {
-               irq_desc[i].handler = &level_irq_type;
+               irq_desc[i].chip = &level_irq_type;
        }
 
        /* Stop Timer 1-3 */
@@ -295,7 +295,7 @@ void __init arch_init_irq(void)
        configPR |= 0x00000038;
        write_c0_config7(configPR);
 
-       irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type;
+       irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type;
        setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action);
 }
 
index b19820110aa3a91c52c9bf1f0157b3979001a315..989167b49ce92e70611940937a10c3a7efff5e28 100644 (file)
@@ -279,9 +279,9 @@ int __init ip22_eisa_init(void)
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
                if (i < (SGINT_EISA + 8))
-                       irq_desc[i].handler = &ip22_eisa1_irq_type;
+                       irq_desc[i].chip = &ip22_eisa1_irq_type;
                else
-                       irq_desc[i].handler = &ip22_eisa2_irq_type;
+                       irq_desc[i].chip = &ip22_eisa2_irq_type;
        }
 
        /* Cannot use request_irq because of kmalloc not being ready at such
index fc6a7e2b189ccd90224c54dbf6ac4ae62ba99b68..18906af6969100e7c51f9b0c9a62a60ad1c3ad3e 100644 (file)
@@ -436,7 +436,7 @@ void __init arch_init_irq(void)
                irq_desc[i].status      = IRQ_DISABLED;
                irq_desc[i].action      = 0;
                irq_desc[i].depth       = 1;
-               irq_desc[i].handler     = handler;
+               irq_desc[i].chip        = handler;
        }
 
        /* vector handler. this register the IRQ as non-sharable */
index 0b61a39ce2bb1f116f991b94d481aa6cd2825096..869566c360ae9b5fe5a4e7b2d848498d39dda975 100644 (file)
@@ -386,7 +386,7 @@ void __devinit register_bridge_irq(unsigned int irq)
        irq_desc[irq].status    = IRQ_DISABLED;
        irq_desc[irq].action    = 0;
        irq_desc[irq].depth     = 1;
-       irq_desc[irq].handler   = &bridge_irq_type;
+       irq_desc[irq].chip      = &bridge_irq_type;
 }
 
 int __devinit request_bridge_irq(struct bridge_controller *bc)
index 8ba08047d164222b31bf6315b66fb51603d3a93a..00b94aaf6371834134736b909979397c9c7c52f9 100644 (file)
@@ -591,7 +591,7 @@ void __init arch_init_irq(void)
                irq_desc[irq].status = IRQ_DISABLED;
                irq_desc[irq].action = 0;
                irq_desc[irq].depth = 0;
-               irq_desc[irq].handler = controller;
+               irq_desc[irq].chip = controller;
        }
        setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
        setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);
index e61760b14d99ec208d741e85f121f99cfb189838..610df40cb82088241ed6fdcb52e98ed30cef455d 100644 (file)
@@ -276,10 +276,10 @@ void __init init_bcm1480_irqs(void)
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
                if (i < BCM1480_NR_IRQS) {
-                       irq_desc[i].handler = &bcm1480_irq_type;
+                       irq_desc[i].chip = &bcm1480_irq_type;
                        bcm1480_irq_owner[i] = 0;
                } else {
-                       irq_desc[i].handler = &no_irq_type;
+                       irq_desc[i].chip = &no_irq_type;
                }
        }
 }
index f853c32f60a0f7e1b847f289a469b8e2b0932ada..fcc61940f1ff6444e8e03fed4cdf105a9cac555e 100644 (file)
@@ -246,10 +246,10 @@ void __init init_sb1250_irqs(void)
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
                if (i < SB1250_NR_IRQS) {
-                       irq_desc[i].handler = &sb1250_irq_type;
+                       irq_desc[i].chip = &sb1250_irq_type;
                        sb1250_irq_owner[i] = 0;
                } else {
-                       irq_desc[i].handler = &no_irq_type;
+                       irq_desc[i].chip = &no_irq_type;
                }
        }
 }
index 7365b4853ddb212a0d6073d49d60460838819f1f..c19e158ec402ad22dc2b6f60a7677f7102e7b72f 100644 (file)
@@ -203,7 +203,7 @@ void __init arch_init_irq(void)
                irq_desc[i].status     = IRQ_DISABLED;
                irq_desc[i].action     = 0;
                irq_desc[i].depth      = 1;
-               irq_desc[i].handler    = &pciasic_irq_type;
+               irq_desc[i].chip    = &pciasic_irq_type;
        }
 
        change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4);
index 8ca68015cf40ffd9456a17febfa107187eb8b18d..a42be00483e6d57f07bcdbe10b1267570939a974 100644 (file)
@@ -227,7 +227,7 @@ static void __init tx4927_irq_cp0_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &tx4927_irq_cp0_type;
+               irq_desc[i].chip = &tx4927_irq_cp0_type;
        }
 
        return;
@@ -435,7 +435,7 @@ static void __init tx4927_irq_pic_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 2;
-               irq_desc[i].handler = &tx4927_irq_pic_type;
+               irq_desc[i].chip = &tx4927_irq_pic_type;
        }
 
        setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
index aee07ff2212a37bb1348a6a48d783dea94a8146e..c67978b6dae494b5ec08f6b175f759be3c941faf 100644 (file)
@@ -368,7 +368,7 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 3;
-               irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type;
+               irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type;
        }
 
        setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
@@ -526,7 +526,7 @@ static void __init toshiba_rbtx4927_irq_isa_init(void)
                irq_desc[i].action = 0;
                irq_desc[i].depth =
                    ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5));
-               irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type;
+               irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type;
        }
 
        setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
@@ -692,13 +692,13 @@ void toshiba_rbtx4927_irq_dump(char *key)
        {
                u32 i, j = 0;
                for (i = 0; i < NR_IRQS; i++) {
-                       if (strcmp(irq_desc[i].handler->typename, "none")
+                       if (strcmp(irq_desc[i].chip->typename, "none")
                            == 0)
                                continue;
 
                        if ((i >= 1)
-                           && (irq_desc[i - 1].handler->typename ==
-                               irq_desc[i].handler->typename)) {
+                           && (irq_desc[i - 1].chip->typename ==
+                               irq_desc[i].chip->typename)) {
                                j++;
                        } else {
                                j = 0;
@@ -707,12 +707,12 @@ void toshiba_rbtx4927_irq_dump(char *key)
                            (TOSHIBA_RBTX4927_IRQ_INFO,
                             "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
                             key, i, i, irq_desc[i].status,
-                            (u32) irq_desc[i].handler,
+                            (u32) irq_desc[i].chip,
                             (u32) irq_desc[i].action,
                             (u32) (irq_desc[i].action ? irq_desc[i].
                                    action->handler : 0),
                             irq_desc[i].depth,
-                            irq_desc[i].handler->typename, j);
+                            irq_desc[i].chip->typename, j);
                }
        }
 #endif
index 873805178d8e993b09402aad77ce8a9524f9bf83..0b2f8c8492181e4724b5675fdffed196ba207877 100644 (file)
@@ -102,7 +102,7 @@ tx4938_irq_cp0_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &tx4938_irq_cp0_type;
+               irq_desc[i].chip = &tx4938_irq_cp0_type;
        }
 
        return;
@@ -306,7 +306,7 @@ tx4938_irq_pic_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 2;
-               irq_desc[i].handler = &tx4938_irq_pic_type;
+               irq_desc[i].chip = &tx4938_irq_pic_type;
        }
 
        setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action);
index 9cd9c0fe22658c9bcbcd6fbdb6e62a73f3ca609b..3b8245dc5bd38e9b074a4e12902bae0efb1082a9 100644 (file)
@@ -146,7 +146,7 @@ toshiba_rbtx4938_irq_ioc_init(void)
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = 0;
                irq_desc[i].depth = 3;
-               irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type;
+               irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type;
        }
 
        setup_irq(RBTX4938_IRQ_IOCINT,
index 07ae19cf0c296d93422abe4db50f5d5c30c4f683..b9323302cc4e6fbf4b6312dab00b0617656ba4e3 100644 (file)
@@ -722,10 +722,10 @@ static int __init vr41xx_icu_init(void)
        icu2_write(MGIUINTHREG, 0xffff);
 
        for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
-               irq_desc[i].handler = &sysint1_irq_type;
+               irq_desc[i].chip = &sysint1_irq_type;
 
        for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
-               irq_desc[i].handler = &sysint2_irq_type;
+               irq_desc[i].chip = &sysint2_irq_type;
 
        cascade_irq(INT0_IRQ, icu_get_irq);
        cascade_irq(INT1_IRQ, icu_get_irq);
index 86796bb63c3c7e3d6b3aaa41626a52a43b8eca35..66aa50802deb6fcc06dd399a90b9c86a2a4a5d5a 100644 (file)
@@ -73,13 +73,13 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs)
        if (cascade->get_irq != NULL) {
                unsigned int source_irq = irq;
                desc = irq_desc + source_irq;
-               desc->handler->ack(source_irq);
+               desc->chip->ack(source_irq);
                irq = cascade->get_irq(irq, regs);
                if (irq < 0)
                        atomic_inc(&irq_err_count);
                else
                        irq_dispatch(irq, regs);
-               desc->handler->end(source_irq);
+               desc->chip->end(source_irq);
        } else
                do_IRQ(irq, regs);
 }
index 3e31f8193d2115ef100674e6cddc015bd5acfa62..2d287b8893d90f4081c7742191e8ff2f24000af3 100644 (file)
@@ -483,7 +483,7 @@ static inline int vrc4173_icu_init(int cascade_irq)
        vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW);
 
        for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++)
-                irq_desc[i].handler = &vrc4173_irq_type;
+                irq_desc[i].chip = &vrc4173_irq_type;
 
        return 0;
 }
index 31db6b61a39e9627ad7c5da13e2e4de555880325..7b2511ca0a616a0c4729ba244d392fcbea0361ff 100644 (file)
@@ -104,7 +104,7 @@ void __init rockhopper_init_irq(void)
        }
 
        for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++)
-               irq_desc[i].handler = &i8259_irq_type;
+               irq_desc[i].chip = &i8259_irq_type;
 
        setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade);
 
index 197936d9359a4065332a2c9a67ad8bd69ad04f33..26e69f73fdb026d09b30507c46f170ef5153ff91 100644 (file)
@@ -158,7 +158,7 @@ int show_interrupts(struct seq_file *p, void *v)
                seq_printf(p, "%10u ", kstat_irqs(i));
 #endif
 
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
 #ifndef PARISC_IRQ_CR16_COUNTS
                seq_printf(p, "  %s", action->name);
 
@@ -210,12 +210,12 @@ int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *type, void *data)
 {
        if (irq_desc[irq].action)
                return -EBUSY;
-       if (irq_desc[irq].handler != &cpu_interrupt_type)
+       if (irq_desc[irq].chip != &cpu_interrupt_type)
                return -EBUSY;
 
        if (type) {
-               irq_desc[irq].handler = type;
-               irq_desc[irq].handler_data = data;
+               irq_desc[irq].chip = type;
+               irq_desc[irq].chip_data = data;
                cpu_interrupt_type.enable(irq);
        }
        return 0;
@@ -378,7 +378,7 @@ static void claim_cpu_irqs(void)
 {
        int i;
        for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
-               irq_desc[i].handler = &cpu_interrupt_type;
+               irq_desc[i].chip = &cpu_interrupt_type;
        }
 
        irq_desc[TIMER_IRQ].action = &timer_action;
index e253a45dcf10d62cb8c18b5faa028d3415c125c9..1bfad7c2f8c8efc072bf7dda768388d6085e4e4e 100644 (file)
@@ -193,10 +193,10 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
                struct irq_desc *desc = irq_descp(irq);
 
                if (desc->status & IRQ_INPROGRESS)
-                       desc->handler->end(irq);
+                       desc->chip->end(irq);
 
                if (!(desc->status & IRQ_DISABLED))
-                       desc->handler->disable(irq);
+                       desc->chip->disable(irq);
        }
 
        if (ppc_md.kexec_cpu_down)
index 40d4c14fde8fa2ae3333062786688584b3387757..8cfc779d882db48f716872bd48a543057708d93c 100644 (file)
@@ -120,8 +120,8 @@ int show_interrupts(struct seq_file *p, void *v)
 #else
                seq_printf(p, "%10u ", kstat_irqs(i));
 #endif /* CONFIG_SMP */
-               if (desc->handler)
-                       seq_printf(p, " %s ", desc->handler->typename);
+               if (desc->chip)
+                       seq_printf(p, " %s ", desc->chip->typename);
                else
                        seq_puts(p, "  None      ");
                seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge  ");
@@ -169,8 +169,8 @@ void fixup_irqs(cpumask_t map)
                        printk("Breaking affinity for irq %i\n", irq);
                        mask = map;
                }
-               if (irq_desc[irq].handler->set_affinity)
-                       irq_desc[irq].handler->set_affinity(irq, mask);
+               if (irq_desc[irq].chip->set_affinity)
+                       irq_desc[irq].chip->set_affinity(irq, mask);
                else if (irq_desc[irq].action && !(warned++))
                        printk("Cannot set affinity for irq %i\n", irq);
        }
index 1bbf822b4efcafada7f9181af9de762772f37f29..7bff3cbc5723b1615b28a46c1e62fe91cdebaccd 100644 (file)
@@ -307,7 +307,7 @@ static void iic_request_ipi(int ipi, const char *name)
        irq = iic_ipi_to_irq(ipi);
        /* IPIs are marked SA_INTERRUPT as they must run with irqs
         * disabled */
-       get_irq_desc(irq)->handler = &iic_pic;
+       get_irq_desc(irq)->chip = &iic_pic;
        get_irq_desc(irq)->status |= IRQ_PER_CPU;
        request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL);
 }
@@ -330,7 +330,7 @@ static void iic_setup_spe_handlers(void)
        for (be=0; be < num_present_cpus() / 2; be++) {
                for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) {
                        int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc;
-                       get_irq_desc(irq)->handler = &iic_pic;
+                       get_irq_desc(irq)->chip = &iic_pic;
                }
        }
 }
index 55cbdd77a62dc417136209438e7e249622283ce3..7c3a0b6d34fdffb443ebaab6771575423a50f241 100644 (file)
@@ -162,7 +162,7 @@ void spider_init_IRQ_hardcoded(void)
                spider_pics[node] = ioremap(spiderpic, 0x800);
                for (n = 0; n < IIC_NUM_EXT; n++) {
                        int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
-                       get_irq_desc(irq)->handler = &spider_pic;
+                       get_irq_desc(irq)->chip = &spider_pic;
                }
 
                /* do not mask any interrupts because of level */
@@ -217,7 +217,7 @@ void spider_init_IRQ(void)
 
                for (n = 0; n < IIC_NUM_EXT; n++) {
                        int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
-                       get_irq_desc(irq)->handler = &spider_pic;
+                       get_irq_desc(irq)->chip = &spider_pic;
                }
 
                /* do not mask any interrupts because of level */
index 62bbbcf5ded3e27d19f5c2ed0f1d2e402171b87f..33bb4aa0e1e819df8464376de3064b48622f76b1 100644 (file)
@@ -242,9 +242,9 @@ void __init iSeries_activate_IRQs()
        for_each_irq (irq) {
                irq_desc_t *desc = get_irq_desc(irq);
 
-               if (desc && desc->handler && desc->handler->startup) {
+               if (desc && desc->chip && desc->chip->startup) {
                        spin_lock_irqsave(&desc->lock, flags);
-                       desc->handler->startup(irq);
+                       desc->chip->startup(irq);
                        spin_unlock_irqrestore(&desc->lock, flags);
                }
        }
@@ -324,7 +324,7 @@ int __init iSeries_allocate_IRQ(HvBusNumber bus,
                + function;
        virtirq = virt_irq_create_mapping(realirq);
 
-       irq_desc[virtirq].handler = &iSeries_IRQ_handler;
+       irq_desc[virtirq].chip = &iSeries_IRQ_handler;
        return virtirq;
 }
 
index 18bf3011d1e3ff103675b0bae793570f4c82606d..9f6189af6dd6b2c5daab9fb1d5d70a3e574ee233 100644 (file)
@@ -446,7 +446,7 @@ static void __init pmac_pic_probe_oldstyle(void)
 
        /* Set the handler for the main PIC */
        for ( i = 0; i < max_real_irqs ; i++ )
-               irq_desc[i].handler = &pmac_pic;
+               irq_desc[i].chip = &pmac_pic;
 
        /* Get addresses of first controller if we have a node for it */
        BUG_ON(of_address_to_resource(master, 0, &r));
@@ -493,7 +493,7 @@ static void __init pmac_pic_probe_oldstyle(void)
        /* Setup handlers for secondary controller and hook cascade irq*/
        if (slave) {
                for ( i = max_real_irqs ; i < max_irqs ; i++ )
-                       irq_desc[i].handler = &gatwick_pic;
+                       irq_desc[i].chip = &gatwick_pic;
                setup_irq(irq_cascade, &gatwick_cascade_action);
        }
        printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs);
index b14f9b5c114edebf110120973e8fe43b4fa1168e..bdc9e26a93cfe6e924337798115f5cfa7ebc5988 100644 (file)
@@ -558,7 +558,7 @@ nextnode:
        }
 
        for (i = irq_offset_value(); i < NR_IRQS; ++i)
-               get_irq_desc(i)->handler = &xics_pic;
+               get_irq_desc(i)->chip = &xics_pic;
 
        xics_setup_cpu();
 
@@ -701,9 +701,9 @@ void xics_migrate_irqs_away(void)
                        continue;
 
                /* We only need to migrate enabled IRQS */
-               if (desc == NULL || desc->handler == NULL
+               if (desc == NULL || desc->chip == NULL
                    || desc->action == NULL
-                   || desc->handler->set_affinity == NULL)
+                   || desc->chip->set_affinity == NULL)
                        continue;
 
                spin_lock_irqsave(&desc->lock, flags);
@@ -728,7 +728,7 @@ void xics_migrate_irqs_away(void)
                       virq, cpu);
 
                /* Reset affinity to all cpus */
-               desc->handler->set_affinity(virq, CPU_MASK_ALL);
+               desc->chip->set_affinity(virq, CPU_MASK_ALL);
                irq_affinity[virq] = CPU_MASK_ALL;
 unlock:
                spin_unlock_irqrestore(&desc->lock, flags);
index b7ac32fdd7766f74ceff0d2098df4614eae83701..2bff30f6d6357aa4b44a8bba2ae7ec17d2d17fcd 100644 (file)
@@ -208,7 +208,7 @@ void __init i8259_init(unsigned long intack_addr, int offset)
        spin_unlock_irqrestore(&i8259_lock, flags);
 
        for (i = 0; i < NUM_ISA_INTERRUPTS; ++i)
-               irq_desc[offset + i].handler = &i8259_pic;
+               irq_desc[offset + i].chip = &i8259_pic;
 
        /* reserve our resources */
        setup_irq(offset + 2, &i8259_irqaction);
index 8f01e0f1d847404ceea8ce035f390c1fa2091f6c..46801f5ec03f3883b424239e7a9c13b958ae9144 100644 (file)
@@ -472,7 +472,7 @@ void __init ipic_init(phys_addr_t phys_addr,
        ipic_write(primary_ipic->regs, IPIC_SEMSR, temp);
 
        for (i = 0 ; i < NR_IPIC_INTS ; i++) {
-               irq_desc[i+irq_offset].handler = &ipic;
+               irq_desc[i+irq_offset].chip = &ipic;
                irq_desc[i+irq_offset].status = IRQ_LEVEL;
        }
 
index bffe50d02c99578fc75f85055387216ee8a88761..f4613ee6b7a295dd18ab5ead37ede2c5ee15c9e4 100644 (file)
@@ -379,14 +379,14 @@ static inline u32 mpic_physmask(u32 cpumask)
 /* Get the mpic structure from the IPI number */
 static inline struct mpic * mpic_from_ipi(unsigned int ipi)
 {
-       return container_of(irq_desc[ipi].handler, struct mpic, hc_ipi);
+       return container_of(irq_desc[ipi].chip, struct mpic, hc_ipi);
 }
 #endif
 
 /* Get the mpic structure from the irq number */
 static inline struct mpic * mpic_from_irq(unsigned int irq)
 {
-       return container_of(irq_desc[irq].handler, struct mpic, hc_irq);
+       return container_of(irq_desc[irq].chip, struct mpic, hc_irq);
 }
 
 /* Send an EOI */
@@ -752,7 +752,7 @@ void __init mpic_init(struct mpic *mpic)
                if (!(mpic->flags & MPIC_PRIMARY))
                        continue;
                irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU;
-               irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi;
+               irq_desc[mpic->ipi_offset+i].chip = &mpic->hc_ipi;
 #endif /* CONFIG_SMP */
        }
 
@@ -813,7 +813,7 @@ void __init mpic_init(struct mpic *mpic)
                /* init linux descriptors */
                if (i < mpic->irq_count) {
                        irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0;
-                       irq_desc[mpic->irq_offset+i].handler = &mpic->hc_irq;
+                       irq_desc[mpic->irq_offset+i].chip = &mpic->hc_irq;
                }
        }
        
index 12b84ca51327f570d8becc0696c0cd405f2edadc..9b3ace26280cb85301fd2954492f6dcb47530750 100644 (file)
@@ -187,7 +187,7 @@ cpm_interrupt_init(void)
          * interrupt vectors
          */
         for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ )
-                irq_desc[i].handler = &cpm_pic;
+                irq_desc[i].chip = &cpm_pic;
 
        /* Set our interrupt handler with the core CPU. */
        if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction))
index fe0cdc04d4366b0c9460486e25d8b00eb4a58a76..5c4118a459f3eb1b6822b5817ee16248f9c9da48 100644 (file)
@@ -734,9 +734,9 @@ void apus_init_IRQ(void)
        for ( i = 0 ; i < AMI_IRQS; i++ ) {
                irq_desc[i].status = IRQ_LEVEL;
                if (i < IRQ_AMIGA_AUTO) {
-                       irq_desc[i].handler = &amiga_irqctrl;
+                       irq_desc[i].chip = &amiga_irqctrl;
                } else {
-                       irq_desc[i].handler = &amiga_sys_irqctrl;
+                       irq_desc[i].chip = &amiga_sys_irqctrl;
                        action = &amiga_sys_irqaction[i-IRQ_AMIGA_AUTO];
                        if (action->name)
                                setup_irq(i, action);
index 866807b4ad0b32ffc32b92c281180b64a4356e9b..41006d2b4b3823a3438f2d79e43caf67b77ee5ab 100644 (file)
@@ -172,7 +172,7 @@ void __init sbc82xx_init_IRQ(void)
        
        /* Set up the interrupt handlers for the i8259 IRQs */
        for (i = NR_SIU_INTS; i < NR_SIU_INTS + 8; i++) {
-                irq_desc[i].handler = &sbc82xx_i8259_ic;
+                irq_desc[i].chip = &sbc82xx_i8259_ic;
                irq_desc[i].status |= IRQ_LEVEL;
        }
 
index 5add0a919ef6182695f88fee3d149bbdd985e7b5..172aa215fdb0d1ac059c725187f9afdc4f5aaaf7 100644 (file)
@@ -140,12 +140,12 @@ cpc700_init_IRQ(void)
                                                        /* IRQ 0 is highest */
 
        for (i = 0; i < 17; i++) {
-               irq_desc[i].handler = &cpc700_pic;
+               irq_desc[i].chip = &cpc700_pic;
                cpc700_pic_init_irq(i);
        }
 
        for (i = 20; i < 32; i++) {
-               irq_desc[i].handler = &cpc700_pic;
+               irq_desc[i].chip = &cpc700_pic;
                cpc700_pic_init_irq(i);
        }
 
index 29d95d415ceb7f70accd8c8381f9666f748be467..c0fee0beb81503722a64053122be7fe90d017b4f 100644 (file)
@@ -171,7 +171,7 @@ void cpm2_init_IRQ(void)
        /* Enable chaining to OpenPIC, and make everything level
         */
        for (i = 0; i < NR_CPM_INTS; i++) {
-               irq_desc[i+CPM_IRQ_OFFSET].handler = &cpm2_pic;
+               irq_desc[i+CPM_IRQ_OFFSET].chip = &cpm2_pic;
                irq_desc[i+CPM_IRQ_OFFSET].status |= IRQ_LEVEL;
        }
 }
index dc3bd9ecbbf6956c88079e1fc5a40e27c3c774f9..91096b38ae70297b77fcd8820e3e51a5d6ecf030 100644 (file)
@@ -98,7 +98,7 @@ gt64260_init_irq(void)
 
        /* use the gt64260 for all (possible) interrupt sources */
        for (i = gt64260_irq_base; i < (gt64260_irq_base + 96); i++)
-               irq_desc[i].handler = &gt64260_pic;
+               irq_desc[i].chip = &gt64260_pic;
 
        if (ppc_md.progress)
                ppc_md.progress("gt64260_init_irq: exit", 0x0);
index 1941a8c7ca9a3dbd851b619c6e55ea7b39bc5dcf..63fa5b313396b42fba12d24cc801b34921b49f96 100644 (file)
@@ -159,7 +159,7 @@ pq2pci_init_irq(void)
        immap->im_memctl.memc_or8 = 0xffff8010;
 #endif
        for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++)
-               irq_desc[irq].handler = &pq2pci_ic;
+               irq_desc[irq].chip = &pq2pci_ic;
 
        /* make PCI IRQ level sensitive */
        immap->im_intctl.ic_siexr &=
index dae9af78bde1ba4674f889be162f87312bbe0733..0c4c0de7c59f0b10990969215b0bca76d37a8c55 100644 (file)
@@ -347,13 +347,13 @@ m8xx_init_IRQ(void)
        int i;
 
        for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++)
-               irq_desc[i].handler = &ppc8xx_pic;
+               irq_desc[i].chip = &ppc8xx_pic;
 
        cpm_interrupt_init();
 
 #if defined(CONFIG_PCI)
        for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++)
-               irq_desc[i].handler = &i8259_pic;
+               irq_desc[i].chip = &i8259_pic;
 
        i8259_pic_irq_offset = I8259_IRQ_OFFSET;
        i8259_init(0);
index c4406f9dc6a3d0d8c2174524533b914a4313f1af..6425b5cee7db2bc7c638c5c5faa41b07467af98b 100644 (file)
@@ -204,9 +204,9 @@ mpc52xx_init_irq(void)
        out_be32(&intr->main_pri1, 0);
        out_be32(&intr->main_pri2, 0);
 
-       /* Initialize irq_desc[i].handler's with mpc52xx_ic. */
+       /* Initialize irq_desc[i].chip's with mpc52xx_ic. */
        for (i = 0; i < NR_IRQS; i++) {
-               irq_desc[i].handler = &mpc52xx_ic;
+               irq_desc[i].chip = &mpc52xx_ic;
                irq_desc[i].status = IRQ_LEVEL;
        }
 
index 5a19697060f0290ba124adb2fca72001ad82e0a3..a4244d46838197d0b6b20126ba7a454f2b7659f8 100644 (file)
@@ -119,7 +119,7 @@ mv64360_init_irq(void)
        /* All interrupts are level interrupts */
        for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) {
                irq_desc[i].status |= IRQ_LEVEL;
-               irq_desc[i].handler = &mv64360_pic;
+               irq_desc[i].chip = &mv64360_pic;
        }
 
        if (ppc_md.progress)
index 70456c8f998c7be7c992cad3ec8c8a61c2959fa4..822058c2983ef7e164b7a3c34dd70a10522baf93 100644 (file)
@@ -373,7 +373,7 @@ void __init openpic_init(int offset)
                                OPENPIC_VEC_IPI+i+offset);
                /* IPIs are per-CPU */
                irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU;
-               irq_desc[OPENPIC_VEC_IPI+i+offset].handler = &open_pic_ipi;
+               irq_desc[OPENPIC_VEC_IPI+i+offset].chip = &open_pic_ipi;
        }
 #endif
 
@@ -408,7 +408,7 @@ void __init openpic_init(int offset)
 
        /* Init descriptors */
        for (i = offset; i < NumSources + offset; i++)
-               irq_desc[i].handler = &open_pic;
+               irq_desc[i].chip = &open_pic;
 
        /* Initialize the spurious interrupt */
        if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd);
index bcbe40de26fe511cf42aba2faa98ff449a7f00d9..b8154efff6ede2c7a14224a920542b4650488dac 100644 (file)
@@ -290,7 +290,7 @@ void __init openpic2_init(int offset)
 
        /* Init descriptors */
        for (i = offset; i < NumSources + offset; i++)
-               irq_desc[i].handler = &open_pic2;
+               irq_desc[i].chip = &open_pic2;
 
        /* Initialize the spurious interrupt */
        if (ppc_md.progress) ppc_md.progress("openpic2: spurious",0x3bd);
index c46043c47225b72b737d79dcaac46cb2a4ced2bf..1584c8b1229f76bac6627a939c4d3efd9b206d4d 100644 (file)
@@ -121,5 +121,5 @@ ppc4xx_pic_init(void)
        ppc_md.get_irq = ppc403_pic_get_irq;
 
        for (i = 0; i < NR_IRQS; i++)
-               irq_desc[i].handler = &ppc403_aic;
+               irq_desc[i].chip = &ppc403_aic;
 }
index fd9af0fc0e9f43ddce46abdba519b73e6c6c1810..e669c1335d47e93bf46a603e2e9ce1dd098420a3 100644 (file)
@@ -276,7 +276,7 @@ void __init ppc4xx_pic_init(void)
 
        /* Attach low-level handlers */
        for (i = 0; i < (NR_UICS << 5); ++i) {
-               irq_desc[i].handler = &__uic[i >> 5].decl;
+               irq_desc[i].chip = &__uic[i >> 5].decl;
                if (is_level_sensitive(i))
                        irq_desc[i].status |= IRQ_LEVEL;
        }
index e672b600f315499a50b84a5ee5750e86f0e8e5c7..39a93dc6375b82a074aad29b9774865e27f001a5 100644 (file)
@@ -143,7 +143,7 @@ ppc4xx_pic_init(void)
        ppc_md.get_irq = xilinx_pic_get_irq;
 
        for (i = 0; i < NR_IRQS; ++i) {
-               irq_desc[i].handler = &xilinx_intc;
+               irq_desc[i].chip = &xilinx_intc;
 
                if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i))
                        irq_desc[i].status &= ~IRQ_LEVEL;
index c0973f8d57bae3c6060a9f4e67ddf9a11adfef21..357fab1bac2ba518eebfc968260b2cd259ec8798 100644 (file)
@@ -102,6 +102,6 @@ static void end_maskreg_irq(unsigned int irq)
 void make_maskreg_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &maskreg_irq_type;
+       irq_desc[irq].chip = &maskreg_irq_type;
        disable_maskreg_irq(irq);
 }
index 6ddbcc77244da4d81653baa2c6bb2a6bb838debd..1d32425782c00cec5fb8ee72875202d2cd667268 100644 (file)
@@ -253,7 +253,7 @@ static void make_bigsur_l1isr(unsigned int irq) {
         /* sanity check first */
         if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
                 /* save the handler in the main description table */
-                irq_desc[irq].handler = &bigsur_l1irq_type;
+                irq_desc[irq].chip = &bigsur_l1irq_type;
                 irq_desc[irq].status = IRQ_DISABLED;
                 irq_desc[irq].action = 0;
                 irq_desc[irq].depth = 1;
@@ -270,7 +270,7 @@ static void make_bigsur_l2isr(unsigned int irq) {
         /* sanity check first */
         if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
                 /* save the handler in the main description table */
-                irq_desc[irq].handler = &bigsur_l2irq_type;
+                irq_desc[irq].chip = &bigsur_l2irq_type;
                 irq_desc[irq].status = IRQ_DISABLED;
                 irq_desc[irq].action = 0;
                 irq_desc[irq].depth = 1;
index d1da0d844567f66156bff7632a4c73012e466fbe..2955adc52310a8afedaa0fe868165d1d7c467403 100644 (file)
@@ -103,7 +103,7 @@ void __init init_cqreek_IRQ(void)
                cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT;
                cqreek_irq_data[14].bit = 1;
 
-               irq_desc[14].handler = &cqreek_irq_type;
+               irq_desc[14].chip = &cqreek_irq_type;
                irq_desc[14].status = IRQ_DISABLED;
                irq_desc[14].action = 0;
                irq_desc[14].depth = 1;
@@ -117,7 +117,7 @@ void __init init_cqreek_IRQ(void)
                cqreek_irq_data[10].bit = (1 << 10);
 
                /* XXX: Err... we may need demultiplexer for ISA irq... */
-               irq_desc[10].handler = &cqreek_irq_type;
+               irq_desc[10].chip = &cqreek_irq_type;
                irq_desc[10].status = IRQ_DISABLED;
                irq_desc[10].action = 0;
                irq_desc[10].depth = 1;
index 55dece35cde5c3be7c687a0eeab5ced10508ba06..0027b80a23435cfd005e45f255ddd62fd5801a52 100644 (file)
@@ -70,7 +70,7 @@ int __init platform_setup(void)
 
        /* Assign all virtual IRQs to the System ASIC int. handler */
        for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
-               irq_desc[i].handler = &systemasic_int;
+               irq_desc[i].chip = &systemasic_int;
 
        board_time_init = aica_time_init;
 
index 5130ba2b6ff1aeb95f2631f496a3a72c25d9e1e3..4b3ef16a0e960dc11d207966454e902dfc3e42c2 100644 (file)
@@ -63,7 +63,7 @@ int __init platform_setup(void)
                str[i] = ctrl_readb(EC3104_BASE + i);
 
        for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
-               irq_desc[i].handler = &ec3104_int;
+               irq_desc[i].chip = &ec3104_int;
 
        printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
               str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
index 52d0ba39031b7215a1a9c62dc3af49461c6f817f..701fa55d52978b25cc0f0067700e9fe49e1bdce8 100644 (file)
@@ -114,7 +114,7 @@ static void enable_harp_irq(unsigned int irq)
 static void __init make_harp_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &harp_irq_type;
+       irq_desc[irq].chip = &harp_irq_type;
        disable_harp_irq(irq);
 }
 
index 2bb581b916834749a71c0ff0c0e66996b51372e5..b72f009c52c26cee58fe5317adb246e83b1ac23d 100644 (file)
@@ -194,7 +194,7 @@ static struct hw_interrupt_type mpc1211_irq_type = {
 
 static void make_mpc1211_irq(unsigned int irq)
 {
-       irq_desc[irq].handler = &mpc1211_irq_type;
+       irq_desc[irq].chip = &mpc1211_irq_type;
        irq_desc[irq].status  = IRQ_DISABLED;
        irq_desc[irq].action  = 0;
        irq_desc[irq].depth   = 1;
index 715e8feb3a68783cc8d1b4375beb632db0f21a7d..2c13a7de6b22ada84a822b199b84cad8af6a4b7b 100644 (file)
@@ -150,7 +150,7 @@ static void enable_od_irq(unsigned int irq)
 static void __init make_od_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &od_irq_type;
+       irq_desc[irq].chip = &od_irq_type;
        disable_od_irq(irq);
 }
 
index ed4c5b50ea45edc29cb77c57f0731dfeda251f47..52a98b524e1fe6263522db00488974dd079046a2 100644 (file)
@@ -86,7 +86,7 @@ static struct hw_interrupt_type hs7751rvoip_irq_type = {
 static void make_hs7751rvoip_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &hs7751rvoip_irq_type;
+       irq_desc[irq].chip = &hs7751rvoip_irq_type;
        disable_hs7751rvoip_irq(irq);
 }
 
index d36c9374aed1dffc9daf9980a5a8439f3da2dd00..e16915d9cda440a3b6e754c6f90e0075eb608cf1 100644 (file)
@@ -100,7 +100,7 @@ static struct hw_interrupt_type rts7751r2d_irq_type = {
 static void make_rts7751r2d_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &rts7751r2d_irq_type;
+       irq_desc[irq].chip = &rts7751r2d_irq_type;
        disable_rts7751r2d_irq(irq);
 }
 
index 7a2eb10edb563c4b108b35204528b536aa1d6e45..845979181059e708cf68d9d902e9b626a1bc1a27 100644 (file)
@@ -105,7 +105,7 @@ static void end_systemh_irq(unsigned int irq)
 void make_systemh_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &systemh_irq_type;
+       irq_desc[irq].chip = &systemh_irq_type;
        disable_systemh_irq(irq);
 }
 
index 70f04caad9a414a1897eab2c585700bd9e8384fa..402735c7c89831cec484953cac01a8d3d5f8bb12 100644 (file)
@@ -85,7 +85,7 @@ void
 make_intreq_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &intreq_irq_type;
+       irq_desc[irq].chip = &intreq_irq_type;
        disable_intreq_irq(irq);
 }
 
index efcbd86b7cd2ff0c546671aaa318916f3ba15def..cb5999425d163641619ce4b403d10675c40e1b9a 100644 (file)
@@ -147,7 +147,7 @@ static void enable_microdev_irq(unsigned int irq)
 static void __init make_microdev_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &microdev_irq_type;
+       irq_desc[irq].chip = &microdev_irq_type;
        disable_microdev_irq(irq);
 }
 
index f014b9bf69224003bdbbb05ff62cfc0540e70e40..724db04cb3929acf6c53ae8ff343a5964045c10c 100644 (file)
@@ -154,7 +154,7 @@ int __init setup_hd64461(void)
        outw(0xffff, HD64461_NIMR);
 
        for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
-               irq_desc[i].handler = &hd64461_irq_type;
+               irq_desc[i].chip = &hd64461_irq_type;
        }
 
        setup_irq(CONFIG_HD64461_IRQ, &irq0);
index 68e4c4e4283dc6341b6cc20d63f8244c2766cb04..cf9142c620b7fbc7b30916dab36e02482fc2b10a 100644 (file)
@@ -182,7 +182,7 @@ static int __init setup_hd64465(void)
        outw(0xffff, HD64465_REG_NIMR);         /* mask all interrupts */
 
        for (i = 0; i < HD64465_IRQ_NUM ; i++) {
-               irq_desc[HD64465_IRQ_BASE + i].handler = &hd64465_irq_type;
+               irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type;
        }
 
        setup_irq(CONFIG_HD64465_IRQ, &irq0);
index 2ee330b3c38f68e5b2b3113ab1ffd56aaf54427e..892214bade194edf67e0387b435ef04b3c792e50 100644 (file)
@@ -191,7 +191,7 @@ void __init setup_voyagergx_irq(void)
                        flag = 1;
                }
                if (flag == 1)
-                       irq_desc[VOYAGER_IRQ_BASE + i].handler = &voyagergx_irq_type;
+                       irq_desc[VOYAGER_IRQ_BASE + i].chip = &voyagergx_irq_type;
        }
 
        setup_irq(IRQ_VOYAGER, &irq0);
index baed9a550d39d9aff4223992b9db6d48b0eb4c5e..a33ae3e0a5a5dc808f72c425d69afca96d4ed531 100644 (file)
@@ -105,6 +105,6 @@ static void shutdown_imask_irq(unsigned int irq)
 void make_imask_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &imask_irq_type;
+       irq_desc[irq].chip = &imask_irq_type;
        enable_irq(irq);
 }
index 06e8afab32e438f75f49c83385229c6f9776a43d..30064bf6e154bf5f46a2f5c0cfea97bf50c616d4 100644 (file)
@@ -137,7 +137,7 @@ void make_intc2_irq(unsigned int irq,
 
        local_irq_restore(flags);
 
-       irq_desc[irq].handler = &intc2_irq_type;
+       irq_desc[irq].chip = &intc2_irq_type;
 
        disable_intc2_irq(irq);
 }
index e55150ed085619d5962e039e1ebb2a4fdc2e9b15..0373b65c77f9c452b9f9d60cb5ad9bf0cf2862be 100644 (file)
@@ -115,7 +115,7 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
        ipr_data[irq].shift = pos*4; /* POSition (0-3) x 4 means shift */
        ipr_data[irq].priority = priority;
 
-       irq_desc[irq].handler = &ipr_irq_type;
+       irq_desc[irq].chip = &ipr_irq_type;
        disable_ipr_irq(irq);
 }
 
index 95d6024fe1ae8b0c218ffd665b7b09d1abe05673..714963a25bbaaa7767ff86ad66adc6791724dcd4 100644 (file)
@@ -85,7 +85,7 @@ static void end_pint_irq(unsigned int irq)
 void make_pint_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &pint_irq_type;
+       irq_desc[irq].chip = &pint_irq_type;
        disable_pint_irq(irq);
 }
 
index b56e79632f241aaa28fb91935ef3dace2c69924c..c2e07f7f3496a45efa79b87be2cc953b2ebd49e0 100644 (file)
@@ -47,7 +47,7 @@ int show_interrupts(struct seq_file *p, void *v)
                        goto unlock;
                seq_printf(p, "%3d: ",i);
                seq_printf(p, "%10u ", kstat_irqs(i));
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
index d69879c0e063dc7ed39f890fd5020345f830a268..675776a5477e04d5e72dfcda1c02f42d61878d00 100644 (file)
@@ -65,7 +65,7 @@ int show_interrupts(struct seq_file *p, void *v)
                        goto unlock;
                seq_printf(p, "%3d: ",i);
                seq_printf(p, "%10u ", kstat_irqs(i));
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
index fc99bf4e362c9dfca4dada4ff45263baa3f46a08..fa730f5fe2e6e6729ab1b9a2b19ae4c7556ecfc9 100644 (file)
@@ -178,7 +178,7 @@ static void end_intc_irq(unsigned int irq)
 void make_intc_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
-       irq_desc[irq].handler = &intc_irq_type;
+       irq_desc[irq].chip = &intc_irq_type;
        disable_intc_irq(irq);
 }
 
@@ -208,7 +208,7 @@ void __init init_IRQ(void)
        /* Set default: per-line enable/disable, priority driven ack/eoi */
        for (i = 0; i < NR_INTC_IRQS; i++) {
                if (platform_int_priority[i] != NO_PRIORITY) {
-                       irq_desc[i].handler = &intc_irq_type;
+                       irq_desc[i].chip = &intc_irq_type;
                }
        }
 
index f797c84bfdd1e9dae8c26211d9ca2024e9297861..05eb7cdc26f0557921231486893d869338974eef 100644 (file)
@@ -187,7 +187,7 @@ void init_cayman_irq(void)
        }
 
        for (i=0; i<NR_EXT_IRQS; i++) {
-               irq_desc[START_EXT_IRQS + i].handler = &cayman_irq_type;
+               irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type;
        }
 
        /* Setup the SMSC interrupt */
index cc89b06d01785a73ca974202da67f6852f52e9da..5d7c821ab7f64eb65d5b94f5a257c3b5fcdbd32f 100644 (file)
@@ -151,7 +151,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %9s", irq_desc[i].handler->typename);
+               seq_printf(p, " %9s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -414,8 +414,8 @@ void irq_install_pre_handler(int virt_irq,
        data->pre_handler_arg1 = arg1;
        data->pre_handler_arg2 = arg2;
 
-       desc->handler = (desc->handler == &sun4u_irq ?
-                        &sun4u_irq_ack : &sun4v_irq_ack);
+       desc->chip = (desc->chip == &sun4u_irq ?
+                     &sun4u_irq_ack : &sun4v_irq_ack);
 }
 
 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
@@ -431,7 +431,7 @@ unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
        bucket = &ivector_table[ino];
        if (!bucket->virt_irq) {
                bucket->virt_irq = virt_irq_alloc(__irq(bucket));
-               irq_desc[bucket->virt_irq].handler = &sun4u_irq;
+               irq_desc[bucket->virt_irq].chip = &sun4u_irq;
        }
 
        desc = irq_desc + bucket->virt_irq;
@@ -465,7 +465,7 @@ unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
        bucket = &ivector_table[sysino];
        if (!bucket->virt_irq) {
                bucket->virt_irq = virt_irq_alloc(__irq(bucket));
-               irq_desc[bucket->virt_irq].handler = &sun4v_irq;
+               irq_desc[bucket->virt_irq].chip = &sun4v_irq;
        }
 
        desc = irq_desc + bucket->virt_irq;
index 2ffda012385e9e5f9f3f15be42389f42c3e1164c..fae43a3054a0bec3c00782e70e66926186a28e8c 100644 (file)
@@ -63,7 +63,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -451,13 +451,13 @@ void __init init_IRQ(void)
        irq_desc[TIMER_IRQ].status = IRQ_DISABLED;
        irq_desc[TIMER_IRQ].action = NULL;
        irq_desc[TIMER_IRQ].depth = 1;
-       irq_desc[TIMER_IRQ].handler = &SIGVTALRM_irq_type;
+       irq_desc[TIMER_IRQ].chip = &SIGVTALRM_irq_type;
        enable_irq(TIMER_IRQ);
        for (i = 1; i < NR_IRQS; i++) {
                irq_desc[i].status = IRQ_DISABLED;
                irq_desc[i].action = NULL;
                irq_desc[i].depth = 1;
-               irq_desc[i].handler = &normal_irq_type;
+               irq_desc[i].chip = &normal_irq_type;
                enable_irq(i);
        }
 }
index 7a151c26f82e2bd7be47a0053deb18bf84f0004d..858c45819aabe496dd663eb27195ea3d835b4f1c 100644 (file)
@@ -65,10 +65,10 @@ int show_interrupts(struct seq_file *p, void *v)
                        int j;
                        int count = 0;
                        int num = -1;
-                       const char *type_name = irq_desc[irq].handler->typename;
+                       const char *type_name = irq_desc[irq].chip->typename;
 
                        for (j = 0; j < NR_IRQS; j++)
-                               if (irq_desc[j].handler->typename == type_name){
+                               if (irq_desc[j].chip->typename == type_name){
                                        if (irq == j)
                                                num = count;
                                        count++;
@@ -117,7 +117,7 @@ init_irq_handlers (int base_irq, int num, int interval,
                irq_desc[base_irq].status  = IRQ_DISABLED;
                irq_desc[base_irq].action  = NULL;
                irq_desc[base_irq].depth   = 1;
-               irq_desc[base_irq].handler = irq_type;
+               irq_desc[base_irq].chip = irq_type;
                base_irq += interval;
        }
 }
index 86b2c1e197aa3f6b1b86c7537aa7d42c6959bcc8..3dd1659427dc3a78f6c09c3e2827d36278f2b1e7 100644 (file)
@@ -235,7 +235,7 @@ void make_8259A_irq(unsigned int irq)
 {
        disable_irq_nosync(irq);
        io_apic_irqs &= ~(1<<irq);
-       irq_desc[irq].handler = &i8259A_irq_type;
+       irq_desc[irq].chip = &i8259A_irq_type;
        enable_irq(irq);
 }
 
@@ -468,12 +468,12 @@ void __init init_ISA_irqs (void)
                        /*
                         * 16 old-style INTA-cycle interrupts:
                         */
-                       irq_desc[i].handler = &i8259A_irq_type;
+                       irq_desc[i].chip = &i8259A_irq_type;
                } else {
                        /*
                         * 'high' PCI IRQs filled in on demand
                         */
-                       irq_desc[i].handler = &no_irq_type;
+                       irq_desc[i].chip = &no_irq_type;
                }
        }
 }
index c768d8a036d0c7998e802944f4cc0103e4ec0dbc..88a8736eb8ce81f6fd7cf9cfad722231a1bff3f0 100644 (file)
@@ -876,15 +876,17 @@ static struct hw_interrupt_type ioapic_edge_type;
 #define IOAPIC_EDGE    0
 #define IOAPIC_LEVEL   1
 
-static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger)
+static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
 {
-       unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
+       unsigned idx;
+
+       idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
 
        if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
                        trigger == IOAPIC_LEVEL)
-               irq_desc[idx].handler = &ioapic_level_type;
+               irq_desc[idx].chip = &ioapic_level_type;
        else
-               irq_desc[idx].handler = &ioapic_edge_type;
+               irq_desc[idx].chip = &ioapic_edge_type;
        set_intr_gate(vector, interrupt[idx]);
 }
 
@@ -986,7 +988,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
         * The timer IRQ doesn't have to know that behind the
         * scene we have a 8259A-master in AEOI mode ...
         */
-       irq_desc[0].handler = &ioapic_edge_type;
+       irq_desc[0].chip = &ioapic_edge_type;
 
        /*
         * Add it to the IO-APIC irq-routing table:
@@ -1683,7 +1685,7 @@ static inline void init_IO_APIC_traps(void)
                                make_8259A_irq(irq);
                        else
                                /* Strange. Oh, well.. */
-                               irq_desc[irq].handler = &no_irq_type;
+                               irq_desc[irq].chip = &no_irq_type;
                }
        }
 }
@@ -1900,7 +1902,7 @@ static inline void check_timer(void)
        apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
 
        disable_8259A_irq(0);
-       irq_desc[0].handler = &lapic_irq_type;
+       irq_desc[0].chip = &lapic_irq_type;
        apic_write(APIC_LVT0, APIC_DM_FIXED | vector);  /* Fixed mode */
        enable_8259A_irq(0);
 
index bfa82f52a5cc5cb869f0c04905cd474ae54853b3..0c2fb2c77bd0c40bc95b9c6ea61737df9f8ce31d 100644 (file)
@@ -79,7 +79,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
 
                seq_printf(p, "  %s", action->name);
                for (action=action->next; action; action = action->next)
@@ -151,8 +151,8 @@ void fixup_irqs(cpumask_t map)
                        printk("Breaking affinity for irq %i\n", irq);
                        mask = map;
                }
-               if (irq_desc[irq].handler->set_affinity)
-                       irq_desc[irq].handler->set_affinity(irq, mask);
+               if (irq_desc[irq].chip->set_affinity)
+                       irq_desc[irq].chip->set_affinity(irq, mask);
                else if (irq_desc[irq].action && !(warned++))
                        printk("Cannot set affinity for irq %i\n", irq);
        }
index 51f9bed455fab0c0576933a7702efb0d51cb84f4..1cf744ee0959e2515d5c47ebcbaffb9e6ac9fba3 100644 (file)
@@ -100,7 +100,7 @@ int show_interrupts(struct seq_file *p, void *v)
                for_each_online_cpu(j)
                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-               seq_printf(p, " %14s", irq_desc[i].handler->typename);
+               seq_printf(p, " %14s", irq_desc[i].chip->typename);
                seq_printf(p, "  %s", action->name);
 
                for (action=action->next; action; action = action->next)
@@ -181,7 +181,7 @@ void __init init_IRQ(void)
        int i;
 
        for (i=0; i < XTENSA_NR_IRQS; i++)
-               irq_desc[i].handler = &xtensa_irq_type;
+               irq_desc[i].chip = &xtensa_irq_type;
 
        cached_irq_mask = 0;
 
index 05e6e814d86fd64d4670dccd38fe8e1eb7132138..073da48c092e0ae804cc6354b9c897c668b6033c 100644 (file)
@@ -689,9 +689,9 @@ static int __devinit giu_probe(struct platform_device *dev)
 
        for (i = GIU_IRQ_BASE; i <= GIU_IRQ_LAST; i++) {
                if (i < GIU_IRQ(GIUINT_HIGH_OFFSET))
-                       irq_desc[i].handler = &giuint_low_irq_type;
+                       irq_desc[i].chip = &giuint_low_irq_type;
                else
-                       irq_desc[i].handler = &giuint_high_irq_type;
+                       irq_desc[i].chip = &giuint_high_irq_type;
        }
 
        return cascade_irq(GIUINT_IRQ, giu_get_irq);
index 6e8ed0c81a6cbd5883fafa74b940e77077d9cee7..ce0a6ebcff15dfa74a4ff8e8812878078a8e46a9 100644 (file)
@@ -299,7 +299,7 @@ struct pci_port_ops dino_port_ops = {
 
 static void dino_disable_irq(unsigned int irq)
 {
-       struct dino_device *dino_dev = irq_desc[irq].handler_data;
+       struct dino_device *dino_dev = irq_desc[irq].chip_data;
        int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
 
        DBG(KERN_WARNING "%s(0x%p, %d)\n", __FUNCTION__, dino_dev, irq);
@@ -311,7 +311,7 @@ static void dino_disable_irq(unsigned int irq)
 
 static void dino_enable_irq(unsigned int irq)
 {
-       struct dino_device *dino_dev = irq_desc[irq].handler_data;
+       struct dino_device *dino_dev = irq_desc[irq].chip_data;
        int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
        u32 tmp;
 
index 9d3bd15bf53be98c071b2c7d7585ba689974b6f9..58f0ce8d78e066c2f75fb63371924db5f41f549f 100644 (file)
@@ -350,7 +350,7 @@ static int __devinit eisa_probe(struct parisc_device *dev)
        irq_desc[2].action = &irq2_action;
        
        for (i = 0; i < 16; i++) {
-               irq_desc[i].handler = &eisa_interrupt_type;
+               irq_desc[i].chip = &eisa_interrupt_type;
        }
        
        EISA_bus = 1;
index 16d40f95978d135d8cf310efff612094c1e6d451..5476ba7709b3cc4a9a7aec1612d74be7898a0f83 100644 (file)
@@ -109,7 +109,7 @@ int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit)
 
 static void gsc_asic_disable_irq(unsigned int irq)
 {
-       struct gsc_asic *irq_dev = irq_desc[irq].handler_data;
+       struct gsc_asic *irq_dev = irq_desc[irq].chip_data;
        int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
        u32 imr;
 
@@ -124,7 +124,7 @@ static void gsc_asic_disable_irq(unsigned int irq)
 
 static void gsc_asic_enable_irq(unsigned int irq)
 {
-       struct gsc_asic *irq_dev = irq_desc[irq].handler_data;
+       struct gsc_asic *irq_dev = irq_desc[irq].chip_data;
        int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
        u32 imr;
 
@@ -164,8 +164,8 @@ int gsc_assign_irq(struct hw_interrupt_type *type, void *data)
        if (irq > GSC_IRQ_MAX)
                return NO_IRQ;
 
-       irq_desc[irq].handler = type;
-       irq_desc[irq].handler_data = data;
+       irq_desc[irq].chip = type;
+       irq_desc[irq].chip_data = data;
        return irq++;
 }
 
index 7a458d5bc75134d925aa272b34af805f1646384e..1fbda77cefc29bfb0bbe820314feabce0d2c9700 100644 (file)
@@ -619,7 +619,7 @@ iosapic_set_irt_data( struct vector_info *vi, u32 *dp0, u32 *dp1)
 
 static struct vector_info *iosapic_get_vector(unsigned int irq)
 {
-       return irq_desc[irq].handler_data;
+       return irq_desc[irq].chip_data;
 }
 
 static void iosapic_disable_irq(unsigned int irq)
index 828eb45062de3fa51182d1c61660961307fc0b11..a988dc7a9abd33a4c7f579bcf15e7a3aab003dfe 100644 (file)
@@ -360,7 +360,7 @@ int superio_fixup_irq(struct pci_dev *pcidev)
 #endif
 
        for (i = 0; i < 16; i++) {
-               irq_desc[i].handler = &superio_interrupt_type;
+               irq_desc[i].chip = &superio_interrupt_type;
        }
 
        /*
index 7f8429284fabe0663e4c6dc30fc6deefeaa178e3..76d023d8a33b92c7f940c05815434061f47a6adb 100644 (file)
@@ -429,12 +429,12 @@ static void irq_handler_init(int cap_id, int pos, int mask)
 
        spin_lock_irqsave(&irq_desc[pos].lock, flags);
        if (cap_id == PCI_CAP_ID_MSIX)
-               irq_desc[pos].handler = &msix_irq_type;
+               irq_desc[pos].chip = &msix_irq_type;
        else {
                if (!mask)
-                       irq_desc[pos].handler = &msi_irq_wo_maskbit_type;
+                       irq_desc[pos].chip = &msi_irq_wo_maskbit_type;
                else
-                       irq_desc[pos].handler = &msi_irq_w_maskbit_type;
+                       irq_desc[pos].chip = &msi_irq_w_maskbit_type;
        }
        spin_unlock_irqrestore(&irq_desc[pos].lock, flags);
 }
index b39435bbfaeb2aa3c3f14bbc34499f6a16046313..c662e4f89d46174cf54b2d8af74c8d63b23fcc10 100644 (file)
@@ -244,8 +244,8 @@ static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
 
        hs_mapped_irq[irq].sock = sp;
        /* insert ourselves as the irq controller */
-       hs_mapped_irq[irq].old_handler = irq_desc[irq].handler;
-       irq_desc[irq].handler = &hd64465_ss_irq_type;
+       hs_mapped_irq[irq].old_handler = irq_desc[irq].chip;
+       irq_desc[irq].chip = &hd64465_ss_irq_type;
 }
 
 
@@ -260,7 +260,7 @@ static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
            return;
                
        /* restore the original irq controller */
-       irq_desc[irq].handler = hs_mapped_irq[irq].old_handler;
+       irq_desc[irq].chip = hs_mapped_irq[irq].old_handler;
 }
 
 /*============================================================*/
index ce0f7db63c1673a1435d93e7906a27bb9cb947cd..a27ed3feb315fa9476669a5e2188031e6046a147 100644 (file)
@@ -86,20 +86,20 @@ static inline void local_irq_save_ptr(unsigned long *flags)
 #define mask_irq(irq)                                          \
        ({                                                      \
                irq_desc_t *desc = get_irq_desc(irq);           \
-               if (desc->handler && desc->handler->disable)    \
-                       desc->handler->disable(irq);            \
+               if (desc->chip && desc->chip->disable)  \
+                       desc->chip->disable(irq);               \
        })
 #define unmask_irq(irq)                                                \
        ({                                                      \
                irq_desc_t *desc = get_irq_desc(irq);           \
-               if (desc->handler && desc->handler->enable)     \
-                       desc->handler->enable(irq);             \
+               if (desc->chip && desc->chip->enable)   \
+                       desc->chip->enable(irq);                \
        })
 #define ack_irq(irq)                                           \
        ({                                                      \
                irq_desc_t *desc = get_irq_desc(irq);           \
-               if (desc->handler && desc->handler->ack)        \
-                       desc->handler->ack(irq);                \
+               if (desc->chip && desc->chip->ack)      \
+                       desc->chip->ack(irq);           \
        })
 
 /* Should we handle this via lost interrupts and IPIs or should we don't care like
index 676e00dfb21a623c6922436646cc4e85be8d7656..9597a69042395ac6f5dafd2f1b50bf79a7500fae 100644 (file)
@@ -69,8 +69,8 @@ typedef struct hw_interrupt_type  hw_irq_controller;
  * Pad this out to 32 bytes for cache and indexing reasons.
  */
 typedef struct irq_desc {
-       hw_irq_controller *handler;
-       void *handler_data;
+       hw_irq_controller *chip;
+       void *chip_data;
        struct irqaction *action;       /* IRQ action list */
        unsigned int status;            /* IRQ status */
        unsigned int depth;             /* nested irq disables */
index 3467097ca61ae476a74a7eb1519950acc9a8ebcf..6f1e68a46cbc72b2d7844f03792902091c4dc740 100644 (file)
@@ -41,7 +41,7 @@ unsigned long probe_irq_on(void)
 
                spin_lock_irq(&desc->lock);
                if (!irq_desc[i].action)
-                       irq_desc[i].handler->startup(i);
+                       irq_desc[i].chip->startup(i);
                spin_unlock_irq(&desc->lock);
        }
 
@@ -59,7 +59,7 @@ unsigned long probe_irq_on(void)
                spin_lock_irq(&desc->lock);
                if (!desc->action) {
                        desc->status |= IRQ_AUTODETECT | IRQ_WAITING;
-                       if (desc->handler->startup(i))
+                       if (desc->chip->startup(i))
                                desc->status |= IRQ_PENDING;
                }
                spin_unlock_irq(&desc->lock);
@@ -85,7 +85,7 @@ unsigned long probe_irq_on(void)
                        /* It triggered already - consider it spurious. */
                        if (!(status & IRQ_WAITING)) {
                                desc->status = status & ~IRQ_AUTODETECT;
-                               desc->handler->shutdown(i);
+                               desc->chip->shutdown(i);
                        } else
                                if (i < 32)
                                        val |= 1 << i;
@@ -128,7 +128,7 @@ unsigned int probe_irq_mask(unsigned long val)
                                mask |= 1 << i;
 
                        desc->status = status & ~IRQ_AUTODETECT;
-                       desc->handler->shutdown(i);
+                       desc->chip->shutdown(i);
                }
                spin_unlock_irq(&desc->lock);
        }
@@ -173,7 +173,7 @@ int probe_irq_off(unsigned long val)
                                nr_irqs++;
                        }
                        desc->status = status & ~IRQ_AUTODETECT;
-                       desc->handler->shutdown(i);
+                       desc->chip->shutdown(i);
                }
                spin_unlock_irq(&desc->lock);
        }
index 0f6530117105c6f000668c3bcae8ca8be1b6e4bd..f9d95705a4ac5bfee0f313e6e028006892bf7c48 100644 (file)
@@ -31,7 +31,7 @@
 irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = {
        [0 ... NR_IRQS-1] = {
                .status = IRQ_DISABLED,
-               .handler = &no_irq_type,
+               .chip = &no_irq_type,
                .lock = SPIN_LOCK_UNLOCKED
        }
 };
@@ -118,16 +118,16 @@ fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs)
                /*
                 * No locking required for CPU-local interrupts:
                 */
-               if (desc->handler->ack)
-                       desc->handler->ack(irq);
+               if (desc->chip->ack)
+                       desc->chip->ack(irq);
                action_ret = handle_IRQ_event(irq, regs, desc->action);
-               desc->handler->end(irq);
+               desc->chip->end(irq);
                return 1;
        }
 
        spin_lock(&desc->lock);
-       if (desc->handler->ack)
-               desc->handler->ack(irq);
+       if (desc->chip->ack)
+               desc->chip->ack(irq);
        /*
         * REPLAY is when Linux resends an IRQ that was dropped earlier
         * WAITING is used by probe to mark irqs that are being tested
@@ -187,7 +187,7 @@ out:
         * The ->end() handler has to deal with interrupts which got
         * disabled while the handler was running.
         */
-       desc->handler->end(irq);
+       desc->chip->end(irq);
        spin_unlock(&desc->lock);
 
        return 1;
index 1279e3499534d490212053812a64671a59b3132d..31ee1f3bfcf92bae6ddab6b240d9623e81b59b28 100644 (file)
@@ -69,7 +69,7 @@ void disable_irq_nosync(unsigned int irq)
        spin_lock_irqsave(&desc->lock, flags);
        if (!desc->depth++) {
                desc->status |= IRQ_DISABLED;
-               desc->handler->disable(irq);
+               desc->chip->disable(irq);
        }
        spin_unlock_irqrestore(&desc->lock, flags);
 }
@@ -131,9 +131,9 @@ void enable_irq(unsigned int irq)
                desc->status = status;
                if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
                        desc->status = status | IRQ_REPLAY;
-                       hw_resend_irq(desc->handler,irq);
+                       hw_resend_irq(desc->chip,irq);
                }
-               desc->handler->enable(irq);
+               desc->chip->enable(irq);
                /* fall-through */
        }
        default:
@@ -178,7 +178,7 @@ int setup_irq(unsigned int irq, struct irqaction * new)
        if (irq >= NR_IRQS)
                return -EINVAL;
 
-       if (desc->handler == &no_irq_type)
+       if (desc->chip == &no_irq_type)
                return -ENOSYS;
        /*
         * Some drivers like serial.c use request_irq() heavily,
@@ -230,10 +230,10 @@ int setup_irq(unsigned int irq, struct irqaction * new)
                desc->depth = 0;
                desc->status &= ~(IRQ_DISABLED | IRQ_AUTODETECT |
                                  IRQ_WAITING | IRQ_INPROGRESS);
-               if (desc->handler->startup)
-                       desc->handler->startup(irq);
+               if (desc->chip->startup)
+                       desc->chip->startup(irq);
                else
-                       desc->handler->enable(irq);
+                       desc->chip->enable(irq);
        }
        spin_unlock_irqrestore(&desc->lock,flags);
 
@@ -295,16 +295,16 @@ void free_irq(unsigned int irq, void *dev_id)
 
                        /* Currently used only by UML, might disappear one day.*/
 #ifdef CONFIG_IRQ_RELEASE_METHOD
-                       if (desc->handler->release)
-                               desc->handler->release(irq, dev_id);
+                       if (desc->chip->release)
+                               desc->chip->release(irq, dev_id);
 #endif
 
                        if (!desc->action) {
                                desc->status |= IRQ_DISABLED;
-                               if (desc->handler->shutdown)
-                                       desc->handler->shutdown(irq);
+                               if (desc->chip->shutdown)
+                                       desc->chip->shutdown(irq);
                                else
-                                       desc->handler->disable(irq);
+                                       desc->chip->disable(irq);
                        }
                        spin_unlock_irqrestore(&desc->lock,flags);
                        unregister_handler_proc(irq, action);
index a12d00eb5e7c01e9495704fbfdae248ab081ed8e..d978c87bca933b7c23fdefc1467c857370e94cf8 100644 (file)
@@ -33,7 +33,7 @@ void move_native_irq(int irq)
        if (unlikely(cpus_empty(pending_irq_cpumask[irq])))
                return;
 
-       if (!desc->handler->set_affinity)
+       if (!desc->chip->set_affinity)
                return;
 
        assert_spin_locked(&desc->lock);
@@ -51,12 +51,12 @@ void move_native_irq(int irq)
         */
        if (likely(!cpus_empty(tmp))) {
                if (likely(!(desc->status & IRQ_DISABLED)))
-                       desc->handler->disable(irq);
+                       desc->chip->disable(irq);
 
-               desc->handler->set_affinity(irq,tmp);
+               desc->chip->set_affinity(irq,tmp);
 
                if (likely(!(desc->status & IRQ_DISABLED)))
-                       desc->handler->enable(irq);
+                       desc->chip->enable(irq);
        }
        cpus_clear(pending_irq_cpumask[irq]);
 }
index afacd6f585fad187cfa950e651ad7e08a0301d81..90fe05f23e692ba3e5fdd4b50e18c47fd1a139c8 100644 (file)
@@ -37,7 +37,7 @@ void proc_set_irq_affinity(unsigned int irq, cpumask_t mask_val)
 {
        set_balance_irq_affinity(irq, mask_val);
        irq_affinity[irq] = mask_val;
-       irq_desc[irq].handler->set_affinity(irq, mask_val);
+       irq_desc[irq].chip->set_affinity(irq, mask_val);
 }
 #endif
 
@@ -59,7 +59,7 @@ static int irq_affinity_write_proc(struct file *file, const char __user *buffer,
        unsigned int irq = (int)(long)data, full_count = count, err;
        cpumask_t new_value, tmp;
 
-       if (!irq_desc[irq].handler->set_affinity || no_irq_affinity)
+       if (!irq_desc[irq].chip->set_affinity || no_irq_affinity)
                return -EIO;
 
        err = cpumask_parse(buffer, count, new_value);
@@ -122,7 +122,7 @@ void register_irq_proc(unsigned int irq)
        char name [MAX_NAMELEN];
 
        if (!root_irq_dir ||
-               (irq_desc[irq].handler == &no_irq_type) ||
+               (irq_desc[irq].chip == &no_irq_type) ||
                        irq_dir[irq])
                return;
 
index b2fb3c18d06bd77d88ed9eb8784f8a4254712a83..ea3ceed362daab5a3e37b025f59a74c933c16f28 100644 (file)
@@ -81,7 +81,7 @@ static int misrouted_irq(int irq, struct pt_regs *regs)
                 * IRQ controller clean up too
                 */
                if(work)
-                       desc->handler->end(i);
+                       desc->chip->end(i);
                spin_unlock(&desc->lock);
        }
        /* So the caller can adjust the irq error counts */
@@ -166,7 +166,7 @@ void note_interrupt(unsigned int irq, irq_desc_t *desc, irqreturn_t action_ret,
                 */
                printk(KERN_EMERG "Disabling IRQ #%d\n", irq);
                desc->status |= IRQ_DISABLED;
-               desc->handler->disable(irq);
+               desc->chip->disable(irq);
        }
        desc->irqs_unhandled = 0;
 }