mmc: sdhci-of-arasan: Add Support for Intel LGM SDXC

The current arasan sdhci PHY configuration isn't compatible
with the PHY on Intel's LGM(Lightning Mountain) SoC devices.

Therefore, add a new compatible, to adapt the Intel's LGM
SDXC PHY with arasan-sdhc controller to configure the PHY.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 7023cbec4017bdf2245ccab9b9c1fe364690534e..55de839a8a5e874b3fdda7eb27895a07093f9b93 100644 (file)
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -120,6 +120,12 @@ static const struct sdhci_arasan_soc_ctl_map intel_lgm_emmc_soc_ctl_map = {
        .hiword_update = false,
 };
 
+static const struct sdhci_arasan_soc_ctl_map intel_lgm_sdxc_soc_ctl_map = {
+       .baseclkfreq = { .reg = 0x80, .width = 8, .shift = 2 },
+       .clockmultiplier = { .reg = 0, .width = -1, .shift = -1 },
+       .hiword_update = false,
+};
+
 /**
  * sdhci_arasan_syscon_write - Write to a field in soc_ctl registers
  *
@@ -384,6 +390,11 @@ static struct sdhci_arasan_of_data intel_lgm_emmc_data = {
        .pdata = &sdhci_arasan_cqe_pdata,
 };
 
+static struct sdhci_arasan_of_data intel_lgm_sdxc_data = {
+       .soc_ctl_map = &intel_lgm_sdxc_soc_ctl_map,
+       .pdata = &sdhci_arasan_cqe_pdata,
+};
+
 #ifdef CONFIG_PM_SLEEP
 /**
  * sdhci_arasan_suspend - Suspend method for the driver
@@ -489,6 +500,10 @@ static const struct of_device_id sdhci_arasan_of_match[] = {
                .compatible = "intel,lgm-sdhci-5.1-emmc",
                .data = &intel_lgm_emmc_data,
        },
+       {
+               .compatible = "intel,lgm-sdhci-5.1-sdxc",
+               .data = &intel_lgm_sdxc_data,
+       },
        /* Generic compatible below here */
        {
                .compatible = "arasan,sdhci-8.9a",