drm/amd/display: Only consider DISPCLK when using optimized boot path
authorAlvin Lee <Alvin.Lee2@amd.com>
Mon, 27 Mar 2023 22:40:34 +0000 (18:40 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Apr 2023 20:28:52 +0000 (16:28 -0400)
[Description]
- Previous bug fix for audio issue included dtbclk and p-state
  on the optimized boot path which is incorarect
- We only care about DISPCLK in the optimized vs. non-optimized
  boot path to avoid audio issues

Reviewed-by: Saaem Rizvi <syedsaaem.rizvi@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c

index 1f5ee5cde6e1c91fcc53d9e238d9e70e81e40c14..26791e3d162f4caeec70138f99a24d389d574b3d 100644 (file)
@@ -721,6 +721,9 @@ static void dcn32_initialize_min_clocks(struct dc *dc)
        clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000;
        clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000;
        clocks->dppclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dppclk_mhz * 1000;
+       clocks->ref_dtbclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dtbclk_mhz * 1000;
+       clocks->fclk_p_state_change_support = true;
+       clocks->p_state_change_support = true;
        if (dc->debug.disable_boot_optimizations) {
                clocks->dispclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dispclk_mhz * 1000;
        } else {
@@ -730,9 +733,6 @@ static void dcn32_initialize_min_clocks(struct dc *dc)
                 * freq to ensure that the timing is valid and unchanged.
                 */
                clocks->dispclk_khz = dc->clk_mgr->funcs->get_dispclk_from_dentist(dc->clk_mgr);
-               clocks->ref_dtbclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dtbclk_mhz * 1000;
-               clocks->fclk_p_state_change_support = true;
-               clocks->p_state_change_support = true;
        }
 
        dc->clk_mgr->funcs->update_clocks(