drm/i915/debugfs: Print sink PSR status
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 25 Apr 2018 21:23:33 +0000 (14:23 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 26 Apr 2018 22:36:12 +0000 (15:36 -0700)
IGT tests could be improved with sink status, knowing for sure that
hardware have activate or exit PSR.

v3:
Reading i915_edp_psr_status was causing PSR to exit but now with
'drm/i915/psr: Prevent PSR exit when a non-pipe related register is
written' it is fixed.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180425212334.21109-3-jose.souza@intel.com
drivers/gpu/drm/i915/i915_debugfs.c

index 1c88805d3354b5c0fbbab0b646d6e7163773a739..cb1a804bf72e5836e8bbfbfcc2db8d644bc7ce2b 100644 (file)
@@ -2603,6 +2603,26 @@ static const char *psr2_live_status(u32 val)
        return "unknown";
 }
 
+static const char *psr_sink_status(u8 val)
+{
+       static const char * const sink_status[] = {
+               "inactive",
+               "transition to active, capture and display",
+               "active, display from RFB",
+               "active, capture and display on sink device timings",
+               "transition to inactive, capture and display, timing re-sync",
+               "reserved",
+               "reserved",
+               "sink internal error"
+       };
+
+       val &= DP_PSR_SINK_STATE_MASK;
+       if (val < ARRAY_SIZE(sink_status))
+               return sink_status[val];
+
+       return "unknown";
+}
+
 static int i915_edp_psr_status(struct seq_file *m, void *data)
 {
        struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -2684,6 +2704,15 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
                seq_printf(m, "EDP_PSR2_STATUS: %x [%s]\n",
                           psr2, psr2_live_status(psr2));
        }
+
+       if (dev_priv->psr.enabled) {
+               struct drm_dp_aux *aux = &dev_priv->psr.enabled->aux;
+               u8 val;
+
+               if (drm_dp_dpcd_readb(aux, DP_PSR_STATUS, &val) == 1)
+                       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", val,
+                                  psr_sink_status(val));
+       }
        mutex_unlock(&dev_priv->psr.lock);
 
        if (READ_ONCE(dev_priv->psr.debug)) {