PCI: Remove add_align overwrite unrelated to size0
authorIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Mon, 16 Dec 2024 17:56:08 +0000 (19:56 +0200)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 18 Feb 2025 21:40:52 +0000 (15:40 -0600)
Commit 566f1dd52816 ("PCI: Relax bridge window tail sizing rules")
relaxed bridge window tail alignment rule for the non-optional part
(size0, no add_size/add_align). The change, however, also overwrote
add_align, which is only related to case where optional size1 related
entry is added into realloc head.

Correct this by removing the add_align overwrite.

Link: https://lore.kernel.org/r/20241216175632.4175-2-ilpo.jarvinen@linux.intel.com
Fixes: 566f1dd52816 ("PCI: Relax bridge window tail sizing rules")
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Xiaochun Lee <lixc17@lenovo.com>
drivers/pci/setup-bus.c

index 3d876d493faf2d4fd2b0a2bf00b6381edff34ee6..3a1fcaad142a4079c02f3dce9f99d6c81f10d199 100644 (file)
@@ -1149,7 +1149,6 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                min_align = 1ULL << (max_order + __ffs(SZ_1M));
                min_align = max(min_align, win_align);
                size0 = calculate_memsize(size, min_size, 0, 0, resource_size(b_res), win_align);
-               add_align = win_align;
                pci_info(bus->self, "bridge window %pR to %pR requires relaxed alignment rules\n",
                         b_res, &bus->busn_res);
        }