drm/xe/oa: Preserve oa_ctrl unused bits

UMD's have interest in setting unused bits of the oa_ctrl register "out of
band" for certain experiments. To facilitate this, don't clobber previous
oa_ctrl unused bits, i.e. rmw the values rather than simply write them.

Fixes: e936f885f1e9 ("drm/xe/oa/uapi: Expose OA stream fd")
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250117032155.3048063-1-ashutosh.dixit@intel.com

diff --git a/drivers/gpu/drm/xe/regs/xe_oa_regs.h b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
index a49561e9f3c312d8d9799d338e6aab649faf9c9b..a79ad2da070c2193a8b9ffdee29937cc51317beb 100644 (file)
--- a/drivers/gpu/drm/xe/regs/xe_oa_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_oa_regs.h
@@ -51,6 +51,10 @@
 /* Common to all OA units */
 #define  OA_OACONTROL_REPORT_BC_MASK           REG_GENMASK(9, 9)
 #define  OA_OACONTROL_COUNTER_SIZE_MASK                REG_GENMASK(8, 8)
+#define  OAG_OACONTROL_USED_BITS \
+       (OAG_OACONTROL_OA_PES_DISAG_EN | OAG_OACONTROL_OA_CCS_SELECT_MASK | \
+        OAG_OACONTROL_OA_COUNTER_SEL_MASK | OAG_OACONTROL_OA_COUNTER_ENABLE | \
+        OA_OACONTROL_REPORT_BC_MASK | OA_OACONTROL_COUNTER_SIZE_MASK)
 
 #define OAG_OA_DEBUG XE_REG(0xdaf8, XE_REG_OPTION_MASKED)
 #define  OAG_OA_DEBUG_DISABLE_MMIO_TRG                 REG_BIT(14)
@@ -78,6 +82,8 @@
 #define OAM_CONTEXT_CONTROL_OFFSET             (0x1bc)
 #define OAM_CONTROL_OFFSET                     (0x194)
 #define  OAM_CONTROL_COUNTER_SEL_MASK          REG_GENMASK(3, 1)
+#define  OAM_OACONTROL_USED_BITS \
+       (OAM_CONTROL_COUNTER_SEL_MASK | OAG_OACONTROL_OA_COUNTER_ENABLE)
 #define OAM_DEBUG_OFFSET                       (0x198)
 #define OAM_STATUS_OFFSET                      (0x19c)
 #define OAM_MMIO_TRG_OFFSET                    (0x1d0)

diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index eeb96b5f49e2af92ed51458035b0c78afa6bf85e..6a08e6c92835f14269763f919f22cab5ef4d005b 100644 (file)
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -452,6 +452,12 @@ static u32 __oa_ccs_select(struct xe_oa_stream *stream)
        return val;
 }
 
+static u32 __oactrl_used_bits(struct xe_oa_stream *stream)
+{
+       return stream->hwe->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAG ?
+               OAG_OACONTROL_USED_BITS : OAM_OACONTROL_USED_BITS;
+}
+
 static void xe_oa_enable(struct xe_oa_stream *stream)
 {
        const struct xe_oa_format *format = stream->oa_buffer.format;
@@ -472,14 +478,14 @@ static void xe_oa_enable(struct xe_oa_stream *stream)
            stream->hwe->oa_unit->type == DRM_XE_OA_UNIT_TYPE_OAG)
                val |= OAG_OACONTROL_OA_PES_DISAG_EN;
 
-       xe_mmio_write32(&stream->gt->mmio, regs->oa_ctrl, val);
+       xe_mmio_rmw32(&stream->gt->mmio, regs->oa_ctrl, __oactrl_used_bits(stream), val);
 }
 
 static void xe_oa_disable(struct xe_oa_stream *stream)
 {
        struct xe_mmio *mmio = &stream->gt->mmio;
 
-       xe_mmio_write32(mmio, __oa_regs(stream)->oa_ctrl, 0);
+       xe_mmio_rmw32(mmio, __oa_regs(stream)->oa_ctrl, __oactrl_used_bits(stream), 0);
        if (xe_mmio_wait32(mmio, __oa_regs(stream)->oa_ctrl,
                           OAG_OACONTROL_OA_COUNTER_ENABLE, 0, 50000, NULL, false))
                drm_err(&stream->oa->xe->drm,
@@ -2534,6 +2540,8 @@ static void __xe_oa_init_oa_units(struct xe_gt *gt)
                        u->type = DRM_XE_OA_UNIT_TYPE_OAM;
                }
 
+               xe_mmio_write32(&gt->mmio, u->regs.oa_ctrl, 0);
+
                /* Ensure MMIO trigger remains disabled till there is a stream */
                xe_mmio_write32(&gt->mmio, u->regs.oa_debug,
                                oag_configure_mmio_trigger(NULL, false));