ARM: dts: aspeed-g5: Sort LPC child nodes by unit address

Lets try to maintain some sort of sanity.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 65c005c54dad520255fdcc5e3a1a7ea8ed710868..ebec0fa8baa7015f15dd6a92c8504d42936b6680 100644 (file)
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -474,17 +474,18 @@
                                                status = "disabled";
                                        };
 
-                                       lhc: lhc@20 {
-                                               compatible = "aspeed,ast2500-lhc";
-                                               reg = <0x20 0x24 0x48 0x8>;
-                                       };
-
                                        lpc_reset: reset-controller@18 {
                                                compatible = "aspeed,ast2500-lpc-reset";
                                                reg = <0x18 0x4>;
                                                #reset-cells = <1>;
                                        };
 
+                                       lhc: lhc@20 {
+                                               compatible = "aspeed,ast2500-lhc";
+                                               reg = <0x20 0x24 0x48 0x8>;
+                                       };
+
+
                                        ibt: ibt@c0 {
                                                compatible = "aspeed,ast2500-ibt-bmc";
                                                reg = <0xc0 0x18>;