arm64: dts: Update cache properties for mediatek

The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20221107155825.1644604-13-pierre.gondois@arm.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 64693c17af9ec0545d02561322d97aa32573ef7c..c326aeb33a109f9f846dc721212bd9e4deef51a1 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -198,16 +198,19 @@
 
                l2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                        next-level-cache = <&l3_0>;
                };
 
                l2_1: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
                        next-level-cache = <&l3_0>;
                };
 
                l3_0: l3-cache {
                        compatible = "cache";
+                       cache-level = <3>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 6b20376191a75a6eef4e23c1caf7a8321f3f7c3d..424fc89cc6f7cb8930bff15acfb9f729e31ffe11 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -169,16 +169,19 @@
 
                l2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                        next-level-cache = <&l3_0>;
                };
 
                l2_1: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
                        next-level-cache = <&l3_0>;
                };
 
                l3_0: l3-cache {
                        compatible = "cache";
+                       cache-level = <3>;
                };
 
                idle-states {

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 905d1a90b406c31d37e24966c4e0cd3cd9152bce..cb74905cfbb819a447f3fcdfe3e7fa42384c0b77 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -213,16 +213,19 @@
 
                l2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                        next-level-cache = <&l3_0>;
                };
 
                l2_1: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
                        next-level-cache = <&l3_0>;
                };
 
                l3_0: l3-cache {
                        compatible = "cache";
+                       cache-level = <3>;
                };
        };